Allegro MicroSystems Assigned Two Patents

Eliminating bit disturbance errors in NVM devices
Allegro MicroSystems, LLC, Manchester, NH, has been assigned a patent (11,327,882) developed by Sarwar, Muhammed, North Grafton, MA, Gupta, Vyankatesh, Manchester, NH, McClay, James, Dudley, MA, Chetlur, Sundar, Bedford, NH, Wong, Harianto, Southborough, MA, Monreal, Gerardo A., Buenos Aires, Argentina, Biberidis, Nicolas Rafael, Barcelona, Spain, Alpago, Octavio H., Ciudad de Buenos Aires, Argentina, and Rigoni, Nicolas, Buenos Aires, Argentina, for “method and apparatus for eliminating bit disturbance errors in non-volatile memory devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method comprising: performing a first read from an address in a data storage module by using a first read voltage, storing, in a first register, data that is retrieved from the data storage module as a result of the first read, performing a second read from the address by using a second read voltage, storing, in a second register, data that is retrieved from the data storage module as a result of the second read, detecting whether a weak bit condition is present at the address based on the data that is stored in the first register and the data that is stored in the second register, and correcting the weak bit condition, when the weak bit condition is present at the address.”

The patent application was filed on February 5, 2020 (16/782,139).

NVM data and address encoding for safety coverage
Allegro MicroSystems, LLC, Manchester, NH, has been assigned a patent (11,169,877) developed by Rigoni, Nicolas, Buenos Aires, Argentina, Biberidis, Nicolas Rafael, Barcelona, Spain, Fahmy, Ahmed Hassan, Methuen, MA, and Alpago, Octavio H., Buenos Aires, Argentina, for “non-volatile memory data and address encoding for safety coverage.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method is disclosed for use in an electronic device having a non-volatile storage device and a volatile storage device, the method comprising: retrieving a first encoded data packet from a first address in the non-volatile storage device, decoding the first encoded data packet to obtain a first data item and a first error code corresponding to the first data item, the first encoded data packet being decoded by using a first coding key that is associated with the first address, detecting whether the first data item is corrupt based on the first error code and an error correction function, storing the first data item at a first address in the volatile storage device when the first data item is not corrupt, and transitioning the electronic device into a safe state when the first data item is corrupt.”

The patent application was filed on March 17, 2020 (16/821,155).