R&D: FeFET-Based Hybrid Memory Accessible by Content and by Address
Discuss how to scale it to multi-bit circuits, as well as its use both as TCAM and as normal memory allowing implementation of reversible functions using one memory table instead of 2 memory tables, and in-memory-computing concepts.
This is a Press Release edited by StorageNewsletter.com on June 13, 2022 at 2:01 pmIEEE Journal on Exploratory Solid-State Computational Devices and Circuits has published an article written by Cédric Marchand, Ian O’Connor, Mayeul Cantan, Univ Lyon, École Centrale de Lyon, CNRS, INSA Lyon, Université Claude Bernard Lyon 1, CPE Lyon, INL, UMR5270, Écully, France, Evelyn T. Breyer, Stefan Slesazeck, NaMLab GmbH, Dresden, Germany, and Thomas Mikolajick, NaMLab GmbH, Dresden, Germany, and Chair of Nanoelectronics, IHM, Dresden University of Technology (TU Dresden), Dresden, Germany.
Abstract: “Emerging non-volatile memory technologies are attracting interest from the system design level to implement alternatives to conventional von-Neumann computing architectures. In particular, the hafnium oxide-based ferroelectric memory technology is fully CMOS-compatible and has already been used for logic-in-memory architectures or compact ternary content addressable memory cells (TCAM). These enable the tight combination of different functionalities in the same circuit to reduce implementation area and energy consumption. In this article, we propose a new hybrid memory circuit, which combines ternary content addressable memory and normal memory capability: the TC-MEM. A 1-bit TC-MEM circuit is proposed and discussed in detail, both as a concept as well as through its implementation in a 28nm FeFET technology. Measurement results demonstrate the circuit functionality. We also discuss how to scale it to multi-bit circuits, as well as its use both as a TCAM and as a normal memory allowing the implementation of reversible functions using one memory table instead of two memory tables, and in-memory-computing concepts.“