Silicon Storage Technology Assigned Patent

Silicon Storage Technology, Inc., San Jose, CA, subsidiary of Microchip, has been assigned a patent (11,309,042) developed by Markov, Viktor, Santa Clara, CA, and Kotov, Alexander, San Jose, CA, for a “method of improving read current stability in analog non-volatile memory by program adjustment for memory cells exhibiting random telegraph noise.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method and device for programming a non-volatile memory cell, where the non-volatile memory cell includes a first gate. The non-volatile memory cell is programmed to an initial program state that corresponds to meeting or exceeding a target threshold voltage for the first gate of the non-volatile memory cell. The target threshold voltage corresponds to a target read current. The non-volatile memory cell is read in a first read operation using a read voltage applied to the first gate of the non-volatile memory cell that is less than the target threshold voltage to generate a first read current. The non-volatile memory cell is subjected to additional programming in response to determining that the first read current is greater than the target read current.”

The patent application was filed on June 29, 2020 (16/915,289).