R&D: Crossbar Array of Magnetoresistive Memory Devices for in-Memory Computing

Nature has published an article written by Seungchul Jung, Hyungwoo Lee, Sungmeen Myung, Hyunsoo Kim, Seung Keun Yoon, Soon-Wan Kwon, Yongmin Ju, Minje Kim, Wooseok Yi, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea, Shinhee Han, Baeseong Kwon, Boyoung Seo, Foundry Business, Samsung Electronics, Yongin-si, South Korea, Kilho Lee, Gwan-Hyeob Koh, Semiconductor R&D Center, Samsung Electronics, Hwaseong-si, South Korea, Kangho Lee, Foundry Business, Samsung Electronics, Yongin-si, South Korea, Yoonjong Song, Semiconductor R&D Center, Samsung Electronics, Hwaseong-si, South Korea, Changkyu Choi, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea, Donhee Ham, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea, and John A. Paulson School of Engineering and Applied Sciences, Harvard University, Cambridge, MA, USA, and Sang Joon Kim, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea.

Abstract: “Implementations of artificial neural networks that borrow analogue techniques could potentially offer low-power alternatives to fully digital approaches^1,2,3. One notable example is in-memory computing based on crossbar arrays of non-volatile memories ^4,5,6,7 that execute, in an analogue manner, multiply–accumulate operations prevalent in artificial neural networks. Various non-volatile memories—including resistive memory ^{8,9,10,11,12,13}, phase-change memory^14,15 and flash memory^16,17,18,19, have been used for such approaches. However, it remains challenging to develop a crossbar array of spin-transfer-torque magnetoresistive random-access memory (MRAM ) ^20,21,22,  despite the technology’s practical advantages such as endurance and large-scale commercialization⁵. The difficulty stems from the low resistance of MRAM, which would result in large power consumption in a conventional crossbar array that uses current summation for analogue multiply–accumulate operations. Here we report a 64 × 64 crossbar array based on MRAM cells that overcomes the low-resistance issue with an architecture that uses resistance summation for analogue multiply–accumulate operations. The array is integrated with readout electronics in 28-nanometre complementary metal–oxide–semiconductor technology. Using this array, a two-layer perceptron is implemented to classify 10,000 Modified National Institute of Standards and Technology digits with an accuracy of 93.23 per cent (software baseline: 95.24 per cent). In an emulation of a deeper, eight-layer Visual Geometry Group-8 neural network with measured errors, the classification accuracy improves to 98.86 per cent (software baseline: 99.28 per cent). We also use the array to implement a single layer in a ten-layer neural network to realize face detection with an accuracy of 93.4 per cent.“