Eidetic Communications Assigned Patent

Eidetic Communications, Inc., Calgary, Canada, has been assigned a patent (11,231,868) developed by Bates, Stephen, Canmore, Canada, and Fard, Saeed Fouladi, Calgary, Canada, for “system and method for performing computational storage utilizing a hardware accelerator.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method, a hardware accelerator, and a system for performing computational storage utilizing a hardware accelerator device that includes a dedicated buffer memory residing on the hardware accelerator device and is connected to a central processing unit (CPU) via a bus includes receiving, at the hardware accelerator device, computation data from the CPU computing device via the bus, performing, at the hardware accelerator device, a check pointing operation on the received computation data to generate check point data, storing the generated check point data on the dedicated buffer memory residing on the hardware accelerator device, and transmitting the check point data directly from the dedicated buffer memory to a solid state memory connected to the hardware accelerator device via the bus for storage, wherein transmitting the check point data bypasses the CPU.”

The patent application was filed on filed: April 7, 2020 (16/842,583).