Winbond Electronics Assigned Sixteen Patents

Resistive random access memories and fabricating
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,177,321) developed by Hsu, Po-Yen, New Taipei, Taiwan, Wu, Bo-Lun, Tianzhong Township, Changhua County, Taiwan, Tsai, Shih-Ning, and Tu, Cheng-Hui, Taichung, Taiwan, for “resistive random access memories and method for fabricating the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A resistive random access memory is provided. The resistive random access memory includes a substrate, a first electrode formed on the substrate, a second electrode formed on the substrate and located on one side of the first electrode, a first metal oxide layer formed on sidewalls of the second electrode, a first control layer formed between the first electrode and the first metal oxide layer, and a second control layer formed on the first control layer and located between the first electrode and the first metal oxide layer.”

The patent application was filed on October 23, 2019 (16/661,121).

Non-volatile memory and erasing operation
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,177,016) developed Wang, Jui-Wei, Taichung, Taiwan, for “non-volatile memory device and erasing operation method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A non-volatile memory device and an erasing operation method thereof are provided. The non-volatile memory device includes a main memory cell region and a control circuit electrically connected to the main memory cell region. The main memory cell region has a plurality of memory cells. The control circuit is configured to perform an erasing operation on the memory cells, wherein the control circuit is configured to: obtain a current threshold voltage of the memory cell to be erased, calculate a difference between the current threshold voltage and an original threshold voltage to obtain a voltage shift value, wherein the original threshold voltage represents the pre-delivery threshold voltage of the memory cells, adjust an erase verify voltage level according to the voltage shift value, and determine whether the erasing operation is completed according to the adjusted erase verify voltage level.”

The patent application was filed on May 27, 2020 (16/885,246).

Resistive random access memory and resetting
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,176,996) developed Wang, Ping-Kun, Lin, Ming-Che, Chen, Yu-Ting, Pai, Chang-Tsung, Liao, Shao-Ching, and Liu, Chi-Ching, Taichung, Taiwan, for “resistive random access memory and resetting method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Provided is a resistive random access memory (RRAM) including at least one memory cell. The at least one memory cell includes a top electrode, a bottom electrode, a data storage layer, an oxygen gettering layer, a first barrier layer, and an oxygen supplying layer. The data storage layer is disposed between the top electrode and the bottom electrode. The oxygen gettering layer is disposed between the data storage layer and the top electrode. The first barrier layer is disposed between the oxygen gettering layer and the data storage layer. The oxygen supplying layer is disposed between the oxygen gettering layer and the top electrode and/or between the oxygen gettering layer and the first barrier layer.”

The patent application was filed on May 13, 2020 (15/930,469).

Memory storage and data access
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,175,988) developed Lin, Lih-Wei, Tsai, Tsung-Huan, Taichung, Taiwan, and Lin, Chi-Shun, San Jose, CA, for “memory storage device and data access method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory storage device including a memory storage array and a memory controller is provided. The memory storage array is configured to store data. The memory controller is coupled to the memory storage array. The memory controller is configured to write to-be-written data to the memory storage array. The to-be-written data includes a plurality of data bits and a flip bit. The memory controller performs a verification operation on the to-be-written data to determine whether the data bits includes error bits and records information of the error bits. The memory controller, determines, according to a quantity of the error bits, whether to invert parities of the data bits and the flip bit, and records the parity of the flip bit. In addition, a data access method is also provided.”

The patent application was filed on March 27, 2020 (16/831,828).

Voltage generating circuit, semiconductor storage device and bit line charging
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,170,828) developed by Okabe, Sho, Kanagawa, Japan, for “voltage generating circuit, semiconductor storage device and bit line charging method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A voltage generating circuit, a semiconductor storage device, and a bit line charging method thereof are provided. The voltage generating circuit includes: an INTVDD generating circuit for generating an internal power supply voltage INTVDD from an external power supply voltage EXVDD, a VDD_V1 generating circuit for generating an internal power supply voltage VDD_V1 from the external power supply voltage EXVDD, and a V1_driving circuit generating a charging voltage for charging the bit line at an output node by using the internal power supply voltage VDD_V1. The V1_driving circuit may generate voltages V1 having different driving capability. The V1_driving circuit charges the bit line with the voltage V1 having a weak driving capability during a first charging period of the bit line and charges the bit line with the voltage V1 having a strong driving capability during a second charging period.”

The patent application was filed on May 26, 2020 (16/882,754).

Test method for memory device
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,164,649) developed by Pan, Tzi-Wen, Taichung, Taiwan, for a “test method for memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A test method for a memory device including the following steps is provided. A redundancy function of the memory device is disable and a first data is written to a first memory array. The redundancy function of the memory device is enabled and a second data is written to a second memory array. The first data and the second data are complementary. A redundancy information is read from a non-volatile memory block according to a margin condition and the second memory array is read based on the redundancy information to obtain a first readout data. A first test result is generated by comparing the second data and the first readout data. The second memory array includes a part of memory cells of the first memory array and at least one redundancy memory cell.”

The patent application was filed on April 20, 2020 (16/853,724).

Non-volatile memory and data writing
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,158,378) developed by Ho, Wen-Chiao, Taichung, Taiwan, for “non-volatile memory and data writing method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A non-volatile memory and a data writing method are provided. The non-volatile memory includes a memory array and a memory controller. The memory array has a plurality of memory cells. The memory controller is configured to perform a data write operation on a plurality of selected memory cells. In the data write operation, the memory controller records a total number of times that a data write pulse is supplied, compares the total number of times of the data write pulse to a preset threshold value to obtain an indication value, and adjusts an absolute value of a voltage of the data write pulse according to the indication value.”

The patent application was filed on March 17, 2020 (16/820,739).

Resistive random access memory
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,152,566) developed by Hsu, Po-Yen, Wu, Bo-Lun, Wang, Ping-Kun, Lin, Ming-Che, Chen, Yu-Ting, Pai, Chang-Tsung, Liao, Shao-Ching, and Liu, Chi-Ching, Taichung, Taiwan, for a “resistive random access memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A resistive random access memory including first and second electrodes, a resistance variable layer, first and second metal layers and a resistance stabilizing layer is provided. The second electrode is disposed on the first electrode. The resistance variable layer is disposed between the first and second electrodes. The first metal layer is disposed between the resistance variable layer and the second electrode. The second metal layer is disposed between the first metal layer and the second electrode. The resistance stabilizing layer is disposed between the first and second metal layers. The oxygen content of the resistance variable layer is higher than that of the first metal layer, the oxygen content of the first metal layer is higher than that of the resistance stabilizing layer, the oxygen content of the resistance stabilizing layer is higher than that of the second metal layer.”

The patent application was filed on December 10, 2019 (16/709,863).

Pseudo static random access memory and operating pseudo static random access memory
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,127,440) developed by Mori, Kaoru, and Nomura, Yukihiro, Kanagawa, Japan, for “pseudo static random access memory and method for operating pseudo static random access memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A pseudo static random access memory including a plurality of memory chips and an information storing device is provided. The memory chips transmit a plurality of read/write data strobe signals to a memory controller by using a same bus. Regardless of whether a self refresh collision occurs in the memory chips, when the memory chips perform a read operation, read latency of the memory chips is set to be a fixed period that self refresh is allowed to be completed. The fixed period is greater than initial latency. The information storing device is configured to store information which defines the fixed period. The read/write data strobe signal indicates whether the self refresh collision occurs in the memory chips, and a level of the read/write data strobe signals is constant during the read latency. A method for operating a pseudo static random access memory is also provided.”

The patent application was filed on February 25, 2020 (16/799,843).

Semiconductor storage and program
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,120,877) developed by Okabe, Sho, Kanagawa, Japan, for “semiconductor storage device and program method.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A program method capable of reducing a peak current of a program operation is provided. The program method of a flash memory includes following steps: charging selective bit lines and non-selective bit lines by using a virtual voltage with weak driving ability during the time from t0 to t1 and a virtual voltage with strong driving ability during the time from t1 to t2, switching at least the non-selective bit lines to use the virtual voltage with weak driving ability for charging during at least the time from t2 to t3 when starting to discharge the selective bit lines connected to selective storage cells to a GND voltage level at time t2, and then applying program voltages to selective word lines.”

The patent application was filed on June 8, 2020 (16/894,895).

Resistive memory
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,055,021) developed by Wang, Ping-Kun, Tianzhong Township, Changhua County, Taiwan, Liao, Shao-Ching, Tongluo Township, Miaoli County, Taiwan, Wu, Chien-Min, Ho, Chia Hua, Hsinchu, Taiwan, Chen, Frederick, Tainan, Taiwan, Chao, He-Hsuan, Hsinchu, Taiwan, and Lim, Seow-Fong, Fremont, CA, for a “resistive memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A resistive memory including a storage array, a storage circuit, a control circuit, a voltage generation circuit and an access circuit is provided. The storage array includes a plurality of blocks. Each block includes a plurality of memory cells. The storage circuit stores a plurality of count values. Each of the count values indicates the number of times that a corresponding block performs a write operation. The control circuit generates a control signal according to the count values when an external command is a write command. The voltage generation circuit provides an operation voltage group according to the control signal. The access circuit accesses the storage array according to the operation voltage group.”

The patent application was filed on March 14, 2019 (16/353,339).

Storage device, access method and system
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,030,130) developed by Liang, Chih-Wei, Fuxing Township, Changhua County, Taiwan, for “storage device, access method and system utilizing the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device including a memory array and a peripheral logic circuit is provided. The memory array includes a plurality of banks and a data path. The peripheral logic circuit operates in a copy mode or a normal mode according to a mode-switch command. In the copy mode, the peripheral logic circuit directs a first bank to provide specific data to the data path and directs a second bank to receive specific data from the data path.”

The patent application was filed on April 6, 2020 (16/840,818).

Semiconductor storage for improved page reliability
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,030,091) developed by Hattori, Norio, Kanagawa, Japan, for a “semiconductor storage device for improved page reliability.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor storage device exhibiting improved programming reliability is provided. In the disclosure, flash memory includes a storage controller and a NAND type storage device. The storage controller includes a voltage detecting part, SRAM, RRAM, and a writer/selector. The voltage detecting part detects whether a power supply voltage drops to a fixed voltage. The SRAM stores a conversion table for converting a logical address into a physical address. The RRAM stores the logical address of a block and a page currently being programmed and conversion information for converting the logical address into another physical address when the fixed voltage is detected by the voltage detecting part during a programming process. The writer/selector converts the inputted logical address into the physical address according to the conversion table or the conversion information of the RRAM and programs data on the page of the block selected according to the converted physical address.”

The patent application was filed on November 12, 2019 (16/681,751).

Memory storage with dynamic data repair mechanism and dynamic data repair
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,010,245) developed by Lien, Chuen-Der, Shieh, Ming-Huei, Lim, Seow-Fong, Cheung, Ngatik, and Lin, Chi-Shun, San Jose, CA, for “memory storage apparatus with dynamic data repair mechanism and method of dynamic data repair thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The disclosure is directed to a memory storage apparatus having a dynamic data repair mechanism. The memory storage apparatus includes a connection interface, a memory array, and a memory control circuit configured at least to: receive, from the connection interface, a write command which includes a user data and an address of the user data, encode the user data as a codeword which includes the user data and parity bits, write the codeword, in a first memory location of the memory array, as a written codeword, perform a read procedure of the written codeword to determine whether the written codeword is erroneously written, and store a redundant codeword of the user data in a second memory location in response to having determined that the written codeword is erroneously written.”

The patent application was filed on June 28, 2019 (16/455,769).

Encoding and memory storage apparatus
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (11,003,529) developed by Lien, Chuen-Der, Shieh, Ming-Huei, Lin, Chi-Shun, and Cheung, Ngatik, San Jose, CA, for “encoding method and memory storage apparatus using the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”An encoding method for a memory storage apparatus adopting an ECC algorithm is provided. The memory storage apparatus comprises an ECC encoder. The encoding method includes: receiving a write command comprising a write address and a write data, reading an existing codeword, attaching a flip bit to the write data, encoding the write data and the flip bit to generate parity bits based on the ECC algorithm by the ECC encoder and attaching the write data and the flip bit to the plurality of parity bits to generate a new codeword, flipping the new codeword based on a number of bits among selected bits required to be changed from the existing codeword to the new codeword, and writing one of the new codeword and the flipped new codeword to the write address. In addition, a memory storage apparatus using the encoding method is provided.”

The patent application was filed on July 12, 2019 (16/509,492).

Memory storage having automatic error repair mechanism and method
Winbond Electronics Corp., Taichung, Taiwan, has been assigned a patent (10,998,081) developed by Park, San-Ha, Taichung, Taiwan, for “memory storage device having automatic error repair mechanism and method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The disclosure is directed to a memory storage device and an automatic error repair method thereof. In an aspect, the memory storage device includes a connection interface configured to receive a write command and a word line address associated with the write command, a memory array including a memory bank which contains an error correction code (ECC) detector, a plurality of memory cells controlled by a word line address, and a plurality of redundant memory cells controlled by a redundant word line address, a fuse blowing controller configured to receive the word line address to blow an electrical fuse of the word line address to enable the plurality of redundant memory cells, and a memory control circuit configured to transfer data from the plurality of memory cells through a bit line into the plurality of redundant memory cells in response to the electrical fuse having been blown.”

The patent application was filed on February 14, 2020 (16/790,750).