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R&D: Metal (Pt)/Ferroelectric (SrBi2Ta2O9)/Insulator (La2O3)/Semiconductor (Si), MFIS Structures for Nonvolatile Memory Applications

Proposed Pt/SrBi2Ta2O9/La2O3/Si structure potential candidate for gate stack of one-transistor type Ferroelectric Field-Effect Transistors nonvolatile memory applications

Applied Physics Letters has published an article written by Shivendra K. Rathaur, School of Computing and Electrical Engineering, Indian Institute of Technology (IIT)-Mandi, Mandi 175075, Himachal Pradesh, India, and , Department of Electrical Engineering, Indian Institute of Technology (IIT)-Delhi, Delhi 110016, India, Robin Khosla, School of Computing and Electrical Engineering, Indian Institute of Technology (IIT)-Mandi, Mandi 175075, Himachal Pradesh, India, Institute of Semiconductor Engineering, University of Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany, and Department of Electronics and Communications Engineering, National Institute of Technology (NIT), Silchar, Assam 788010, India, and Satinder K. Sharma, School of Computing and Electrical Engineering, Indian Institute of Technology (IIT)-Mandi, Mandi 175075, Himachal Pradesh, India.

Abstract: Extended data retention is a cardinal impediment for ferroelectric memories and serves a pivotal role for nonvolatile memory applications. Here, nonvolatile Metal–Ferroelectric–Insulator–Semiconductor (MFIS) structures are fabricated by using thin films of Strontium Bismuth Tantalum Oxide (SrBi2Ta2O9) as ferroelectric and high-κ lanthanum oxide (La2O3) as a buffer insulator on p-Si substrates via RF magnetron sputtering. The grazing incidence x-ray diffraction analysis confirms the dominant (111) and (115) ferroelectric perovskite phases of SrBi2Ta2O9 thin films. Albeit, atomic force microscopy surface micrographs revealed highly smooth La2O3 and SBT (SrBi2Ta2O9) thin films with a surface roughness of ∼0.22 ± 0.04 nm and ∼1.05 ± 0.03 nm, respectively. Capacitance–voltage (C–V), capacitance–time (C–T), and current–voltage (I–V) characteristics of Pt/SrBi2Ta2O9/La2O3/Si, MFIS structures, exhibited a high memory window of ∼1.1 V at ±5 V sweep voltage, data retention measured until ∼104 s even on the extrapolation up to 10 years, and a low leakage current density of ∼12.8 μA/cm2 at −1 V and 300 K. Far from it, the probed conduction mechanism is studied for Pt/SrBi2Ta2O9/La2O3/Si MFIS device structures. The optimum nonvolatile memory characteristics are attributed to the high-quality SBT ferroelectric and the buffer layer La2O3/Si interface of the investigated MFIS structure and also assert from the control Pt/SBT/Pt and Pt/La2O3/Si results. Thus, the proposed Pt/SrBi2Ta2O9/La2O3/Si structure is a potential candidate for a gate stack of one-transistor (1T) type Ferroelectric Field-Effect Transistors nonvolatile memory applications.

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