Apple Assigned Eight Patents
Dynamically adjusting manner in which I/O requests are transmitted between computing device and storage, unified addressable memory, techniques for reducing write amplification on SSDs, flexible over-provisioning of storage space within SSDs, scheduling virtual memory compressors, retention voltage management for volatile memory, rapid restart protection for non-volatile memory, partitioned data replication
By Francis Pelletier | October 18, 2021 at 2:00 pmDynamically adjusting manner in which I/O requests are transmitted between computing device and storage
Apple Inc., Cupertino, CA, has been assigned a patent (11,144,481) developed by Adavi, Bhaskar R., Sunnyvale, CA, and Radhakrishnan, Manoj K., Fremont, CA, for “techniques for dynamically adjusting the manner in which I/O requests are transmitted between a computing device and a storage device.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Disclosed herein is a technique for managing I/O requests transmitted between a computing device and a storage device. According to some embodiments, the technique can be implemented by the computing device, and include providing at least one I/O request to a submission queue configured to store a plurality of I/O requests. In conjunction with providing the at least one I/O request, the computing device can identify that at least one condition associated with the submission queue–and/or a completion queue–is satisfied, where efficiency gains can be achieved. In turn, the computing device can (1) update an operating mode of the storage device to cause the storage device to cease interrupt issuances to the computing device when I/O requests are completed by the storage device, and (2) update an operating mode of the computing device to cause the computing device to periodically check the completion queue for completed I/O requests.”
The patent application was filed on September 19, 2018 (16/136,161).
Unified addressable memory
Apple Inc., Cupertino, CA, has been assigned a patent (11,138,346) developed by Gulati, Manu, Saratoga, CA, Sokol, Jr., Joseph, Wilcox, Jeffrey R., San Jose, CA, Semeria, Bernard J., Palo Alto, CA, and Smith, Michael J., San Francisco, CA, for “unified addressable memory.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “In one embodiment, a system includes a non-volatile memory that may serve as both the main memory system and the backing store (or persistent storage). In some embodiments, the non-volatile memory is divided into a main memory portion and a persistent portion. Data in the main memory operation may be encrypted using one or more first keys, and data in the persistent portion may be encrypted using one or more second keys, in an embodiment. The volatile behavior of main memory may be implemented by discarding the one or more first keys in a power down event or other event that indicates a loss of main memory data, while the one or more second keys may be retained. In one embodiment, the physical address space of the non-volatile memory may be a mapping from a second physical address space that is used within the system.”
The patent application was filed on April 27, 2020 (16/859,634).
Reducing write amplification on SSDs
Apple Inc., Cupertino, CA, has been assigned a patent (11,132,145) developed by Liu, Yuhua, Belmont, CA, Vogan, Andrew W., Cupertino, CA, Byom, Matthew J., and Paley, Alexander, San Jose, CA, for “techniques for reducing write amplification on solid state storage devices (SSDs).“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Disclosed herein are techniques for reducing write amplification when processing write commands directed to a non-volatile memory. According to some embodiments, the method can include the steps of (1) receiving a first plurality of write commands and a second plurality of write commands, where the first plurality of write commands and the second plurality of write commands are separated by a fence command (2) caching the first plurality of write commands, the second plurality of write commands, and the fence command, and (3) in accordance with the fence command, and in response to identifying that at least one condition is satisfied: (i) issuing the first plurality of write commands to the non-volatile memory, (ii) issuing the second plurality of write commands to the non-volatile memory, and (iii) updating log information to reflect that the first plurality of write commands precede the second plurality of write commands.”
The patent application was filed on September 6, 2018 (16/124,154).
Flexible over-provisioning of storage space within SSDs
Apple Inc., Cupertino, CA, has been assigned a patent (11,132,134) developed by Desai, Meha N., and Tamura, Eric B., Sunnyvale, CA, for a “flexible over-provisioning of storage space within solid-state storage devices (SSDs).“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “The embodiments set forth a technique for over-provisioning storage space within a solid-state storage device (SSD). In particular, a file system can (1) receive a first request to create a file, where the first request includes a size for the file, (2) identifying at least one extent that corresponds to storage space within the SSD that satisfies the size for the file, and associating the file with the at least one extent to indicate that the storage space is occupied, (3) receive a second request to cause (i) the file to remain established within the file system, and (ii) the storage space to be marked free within the SSD, and (4) carrying out the second request by causing the storage space to be marked free within the SSD.”
The patent application was filed on September 6, 2018 (16/124,147).
Scheduling virtual memory compressors
Apple Inc., Cupertino, CA, has been assigned a patent (11,113,113) developed by Kumar, Derek R., Cupertino, CA, and Duffy, Jr., Thomas Brogan, Larkspur, CA, for “systems and methods for scheduling virtual memory compressors.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems, apparatuses, and methods for efficiently selecting compressors for data compression are described. In various embodiments, a computing system includes at least one processor and multiple codecs such as one or more hardware codecs and one or more software codecs executable by the processor. The computing system receives a workload and processes instructions, commands and routines corresponding to the workload. One or more of the tasks in the workload are data compression tasks. Current condition(s) are determined during the processing of the workload by the computing system. Conditions are determined to be satisfied based on comparing current selected characteristics to respective thresholds. In one example, when the compressor selector determines a difference between a target compression ratio and an expected compression ratio of the first codec exceeds a threshold, the compressor selector switches from hardware codecs to software codecs.”
The patent application was filed on December 22, 2017 (15/853,239).
Retention voltage management for volatile memory
Apple Inc., Cupertino, CA, has been assigned a patent (11,094,395) developed by Nazar, Shahzad, Fremont, CA, Abu-Rahma, Mohamed H., Mountain View, CA, and Barn, Amrinder S., San Jose, CA, for a “retention voltage management for a volatile memory.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “An apparatus includes a memory circuit that includes a plurality of sub-arrays. The memory circuit is configured to implement a retention mode according to test information indicating voltage sensitivities for the plurality of sub-arrays. The apparatus also includes a voltage control circuit coupled to a power supply node. The voltage control circuit is configured, in response to activation of the retention mode for the plurality of sub-arrays, to generate, based on the test information, at least two different retention voltage levels for different ones of the plurality of sub-arrays. The at least two different retention voltage levels are lower than a power supply voltage level of the power supply node.”
The patent application was filed on November 7, 2019 (16/677,470).
Rapid restart protection for non-volatile memory
Apple Inc., Cupertino, CA, has been assigned a patent (11,094,381) developed by Ashraf, Muhammad N., San Jose, CA, Paley, Alexander, Cupertino, CA, Liu, Yuhua, Belmont, CA, Khmelnitsky, Vadim, Foster City, CA, and Byom, Matthew J., San Jose, CA, for a “rapid restart protection for a non-volatile memory system.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems and methods for managing non-volatile memory devices are provided. Embodiments discussed herein provide rapid restart protection for journaling system. The rapid restart protection prevents the NVM from experiencing memory saturation when the NVM system is being forced to handle multiple successive restarts.”
The patent application was filed on June 2, 2019 (16/429,021).
Partitioned data replication
Apple Inc., Cupertino, CA, has been assigned a patent (11,074,224) developed by Qiu, James, Santa Clara, CA, Wang, Hui, San Mateo, CA, and Lu, Frank, San Jose, CA, for a “partitioned data replication.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “System, method, and computer program product for partitioned data replication are described. A data replication system can partition a file stored on a primary storage device into multiple data blocks, and store an index mapping the blocks and the file. Initially, the system can replicate the file and the index to a secondary storage device. The data stored in the file can change after the initial replication. The system can determine which block among the data blocks has changed by updating the index and comparing the updated index with the original index. The system can then replicate the change by replicating only the changed block and the updated index to the secondary system.”
The patent application was filed on May 11, 2015 (14/709,379).











