TSMC Assigned Nine Patents

Flash memory structure with enhanced floating gate
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (11,107,825) developed by Huang, Hung-Shu, Taichung, Taiwan, and Liu, Ming Chyi, Hsinchu, Taiwan, for a “flash memory structure with enhanced floating gate.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present disclosure relates to a flash memory structure. The flash memory structure includes a first doped region and a second doped region disposed within a substrate. A select gate is disposed over the substrate between the first doped region and the second doped region. A floating gate is disposed over the substrate between the select gate and the first doped region, and a control gate is over the floating gate. The floating gate extends along multiple surfaces of the substrate.”

The patent application was filed on June 23, 2020 (16/909,066).

Improving control gate uniformity during manufacture of processors with embedded flash memory
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (11,069,693) developed by Lin, Meng-Han, Hsinchu, Taiwan, and Wu, Wei Cheng, Zhubei, Taiwan, for a “method for improving control gate uniformity during manufacture of processors with embedded flash memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method is provided for the manufacture of an integrated semiconductor device that includes an embedded flash memory array formed in a recessed region of a semiconductor substrate, the method includes, prior to formation of floating and control gate stacks of the memory array, depositing a protective layer over layers of gate material, and depositing a self-leveling sacrificial layer over the protective layer to produce a substantially planar upper surface. The sacrificial layer is then etched to a depth that removes the sacrificial layer and leaves a substantially planar face on the protective layer. A photo mask is then deposited on the protective layer and the gate stacks are etched from the layers of gate material.”

The patent application was filed on August 20, 2019 (16/545,713).

Semiconductor structure having phase change memory device
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (11,038,101) developed by Lin, Hsing-Lien, Hsin-Chu, Taiwan, Trinh, Hai-Dang, Hsinchu, Taiwan, and Jiang, Fa-Shen, Taoyuan, Taiwan, for a “semiconductor structure having a phase change memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor structure includes a first conductive layer and a second conductive layer, and a memory device between the first conductive layer and the second conductive layer. The memory device includes a top electrode, a bottom electrode adjacent to the first conductive layer, and a phase change material between the top electrode and the bottom electrode. The bottom electrode includes a first portion and a second portion between the first portion and the first conductive layer.”

The patent application was filed on October 11, 2018 (16/157,736).

Phase change material based thermal assessment
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (11,031,556) developed by Chen, Chien-Mao, Zhubei, Taiwan, and Hsu, Hung-Jen, Hsin-Chu, Taiwan, for “systems and methods for phase change material based thermal assessment.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”In an embodiment, a method includes: growing a phase change material on a platform configured for a semiconductor workpiece process, setting the phase change material to an amorphous state, performing the semiconductor workpiece process within a semiconductor processing chamber, and measuring resistance across two points along the phase change material.”

The patent application was filed on April 2, 2019 (16/373,379).

Flash memory cell structure with step-shaped floating gate
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (11,018,233) developed by Chu, Yu-Hsien, Kaohsiung, Taiwan, Chuang, Chiang-Ming, Changhua, Taiwan, and Chung, Cheng-Huan, Pingtung County, Taiwan, for a “flash memory cell structure with step-shaped floating gate.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present disclosure relates to a flash memory cell that includes a substrate and a floating gate structure over the substrate. The floating gate structure includes a first portion having a first top surface and a first thickness. The floating gate structure also includes a second portion having a second top surface and a second thickness that is different from the first thickness. The floating gate structure further includes a sidewall surface connecting the first and second top surfaces, and an angle between the first top surface and the sidewall surface of the floating gate structure is an obtuse angle. The flash memory cell also includes a control gate structure over the first and second portions of the floating gate structure.”

The patent application was filed on May 15, 2020 (16/875,635).

Cooling devices, packaged semiconductor devices, and methods of packaging semiconductor
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (11,004,771) developed by Hsieh, Cheng-Chieh, Tainan County, Taiwan, Wu, Chi-Hsi, Jeng, Shin-Puu, Chen, Tsung-Yu, Hsinchu, Taiwan, and Hung, Wensen, Zhubei, Taiwan, for “cooling devices, packaged semiconductor devices, and methods of packaging semiconductor devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Cooling devices, packaged semiconductor devices, and methods of packaging semiconductor devices are disclosed. In some embodiments, a cooling device for a semiconductor device includes a reservoir having a first plate and a second plate coupled to the first plate. A cavity is between the first plate and the second plate. A phase change material (PCM) is in the cavity. The cooling device is adapted to dissipate heat from a packaged semiconductor device.”

The patent application was filed on April 22, 2019 (16/390,669).

Hybrid sensing scheme compensating for cell resistance instability
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (10,978,148) developed by Wu, Jau-Yi, Zhubei, Taiwan, for a “hybrid sensing scheme compensating for cell resistance instability.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Various embodiments provide a hybrid sensing scheme that may compensate for cell resistance instability in semiconductor devices, such as multi-level cell (MLC) type phase-change random-access memory (PCRAM) structures. Various embodiments may achieve a stable resistance state supporting MLC applications in PCRAM cells.”

The patent application was filed on February 7, 2020 (16/784,512).

High voltage CMOS with co-planar upper gate surfaces for embedded non-volatile memo
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (10,957,704) developed by Chuang, Harry-Hak-Lay, Wu, Wei Cheng, Zhubei, Taiwan, Kao, Ya-Chen, Fuxing Township, Taiwan, and Lu, Yi Hsien, Yuanchang Township, Taiwan, for a “high voltage CMOS with co-planar upper gate surfaces for embedded non-volatile memo.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present disclosure relates to a structure and method for embedding a non-volatile memory (NVM) in a HKMG (high-.kappa. metal gate) integrated circuit which includes a high-voltage (HV) HKMG transistor. NVM devices, e.g., flash memory) are operated at high voltages for its read and write operations and hence a HV device is necessary for integrated circuits involving non-volatile embedded memory and HKMG logic circuits. Forming a HV HKMG circuit along with the HKMG periphery circuit reduces the need for additional boundaries between the HV transistor and rest of the periphery circuit. This method further helps reduce divot issue and reduce cell size.”

The patent application was filed on January 6, 2020 (16/734,691).

Semiconductor memory including phase change material layers
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan, has been assigned a patent (10,950,664) developed by Wu, Jau-Yi, Hsinchu County, Taiwan, for “semiconductor memory device including phase change material layers and method for manufacturing thereo.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor memory device disposed over a substrate includes a common electrode, a selector material layer surrounding the common electrode, and a plurality of phase change material layers in contact with the selector material layer.”

The patent application was filed on September 27, 2019 (16/585,622).