Seagate Technology Assigned Twenty Patents

Wear mitigation in storage through data migration
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,023,352) developed by Gaertner, Mark A., Vadnais Heights, MN, and Kashyap, Anil, Eden Prairie, MN, for a “wear mitigation in a data storage system through data migration.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Method and apparatus for distributing wear in a disc stack. A data transducer is used to record data to a data recording surface in the disc stack. Performance statistics are accumulated including a dwell metric value indicative of dwell time of the transducer adjacent a selected radial location and an operational life metric value indicative of accumulated elapsed operation of the transducer. Data are migrated from the selected radial location to a target location within the disc stack responsive to at least a selected one of the dwell metric value or the operational life metric value. In some cases, the dwell metric value may indicate an estimated amount of lubricant disturbance and the operational life operation may indicate operational hours of a heat assisted magnetic recording (HAMR) element. The target location may be on a different data recording surface having an associated transducer with a lower operational life metric value.”

The patent application was filed on January 19, 2018, (Appl. No.15/875,572).

Acoustic and vibration mitigation in storage system
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,019,754) developed by Kharisov, Evgeny R., Brooklyn, NY, for “acoustic and vibration mitigation in a data storage system.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage system can be vigilant of the acoustic impedance between cooling features and a data storage device to prevent operational degradation in the data storage device as a result of cooling operations from the cooling features. One or more cooling feature may each be positioned on an opposite sides of an air plenum from a data storage device with each cooling feature connected to a cooling module configured to adjust a speed of the first cooling feature in response to a detected operational condition in the data storage device. The cooling features speed adjustment is executed independently to correct an acoustic and vibration disturbance interference in the data storage system.”

The patent application was filed on June 28, 2019, (Appl. No.16/457,272).

Preemptive mitigation of cross-temperature effects in NVM
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,017,864) developed by Getreuer, Kurt Walter, Colorado Springs, CO, Mehta, Darshana H., Shakopee, MN, Khoueir, Antoine, Apple Valley, MN, and Curl, Christopher Joseph, Colorado Springs, CO, for a “preemptive mitigation of cross-temperature effects in a non-volatile memory (NVM).”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Method and apparatus for managing data in a non-volatile memory (NVM) of a storage device, such as a solid-state drive (SSD). An initial temperature is stored associated with the programming of data to memory cells in the NVM. A current temperature associated with the NVM is subsequently measured. At such time that a difference interval between the initial and current temperatures exceeds a selected threshold, a preemptive parametric adjustment operation is applied to the NVM. The operation may include a read voltage calibration, a read voltage increment adjustment, and/or a forced garbage collection operation. The operation results in a new set of read voltage set points for the data suitable for the current temperature, and is carried out independently of any pending read commands associated with the data. The initial temperature can be measured during the programming of the data, or measured during the most recent read voltage calibration operation.”

The patent application was filed on June 26, 2019, (Appl. No.16/453,211).

Master set of read voltages for NVM to mitigate cross-temperature effects
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,017,850) developed by Getreuer, Kurt Walter, Colorado Springs, CO, Mehta, Darshana H., Shakopee, MN, Khoueir, Antoine, Apple Valley, MN, and Curl, Christopher Joseph, Colorado Springs, CO, for a “master set of read voltages for a non-volatile memory (NVM) to mitigate cross-temperature effects.“ The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Method and apparatus for managing data in a non-volatile memory (NVM) of a storage device, such as a solid-state drive (SSD). In some embodiments, first data are read from the NVM using an initial set of read voltages over a selected range of cross-temperature differential (CTD) values comprising a difference between a programming temperature at which the first data are programmed to the NVM cells and a reading temperature at which the first data are subsequently read from the NVM cells. A master set of read voltages is thereafter selected that provides a lowest acceptable error rate performance level over the entirety of the CTD range, and the master set of read voltages is thereafter used irrespective of NVM temperature. In some cases, the master set of read voltages may be further adjusted for different word line addresses, program/erase counts, read counts, data aging, etc.”

The patent application was filed on August 22, 2019, (Appl. No.16/547,925).

Storage devices, and related components and methods of making
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,017,819) developed by Coffey, Jerome, Boulder, CO, Severson, Sam, Longmont, CO, and Lapp, David, Boulder, CO, for “data storage devices, and related components and methods of making.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present disclosure relates to a data storage device interior components and/or data storage device housing components that include one or more solid-state deposition layers, and related methods of applying solid-state material to said components via solid-state deposition.”

The patent application was filed on May 8, 2019, (Appl. No.16/406,728).

Data security using bit transposition during memory accesses
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,017,128) developed by Courtney, Timothy J., Longmont, CO, for a “data security using bit transposition during memory accesses.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Apparatus and method for transferring data between a processing circuit and a memory. In some embodiments, a data storage device has a main non-volatile memory (NVM) configured to store user data from a host device. A controller circuit is configured to direct transfers of the user data between the NVM and the host device. The controller circuit has a programmable processor and a secure data transfer circuit. The secure data transfer circuit executes memory access operations to transfer user data and control values between the processor and a local memory. A memory access operation includes receiving bits of a multi-bit control value on a multi-line bus from the processor, and activating a programmable switching circuit to randomly interconnect different ones of the multi-line bus to transpose the bits in the control value.”

The patent application was filed on May 22, 2018, (Appl. No.15/985,897).

Storage compute appliance with internal data encryption
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,017,127) developed by Secatch, Stacey, Longmont, CO, Conklin, Kristofer C., Burnsville, MN, Simonson, Dana Lynn, Owatonna, MN, and Moss, Robert Wayne, Windsor, CO, for a “storage compute appliance with internal data encryption.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Method and apparatus for managing data in a data storage device configured as a storage compute appliance. In some embodiments, the data storage device has a non-volatile memory (NVM) and a controller circuit. The NVM stores a plurality of data sets encrypted by at least one encryption key. The controller circuit performs a storage compute appliance process by locally decrypting the plurality of data sets in a local memory of the data storage device, generating summary results data from the decrypted data sets, and transferring the summary results data across the host interface to an authorized user without a corresponding transfer of any portion of the decrypted data sets across the host interface.”

The patent application was filed on January 31, 2018, (Appl. No.15/885,187).

Collection of uncorrelated entropy during power down sequence
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,017,098) developed by Secatch, Stacey, Niwot, CO, Williams, Steven S., Longmont, CO, Claude, David W., Loveland, CO, Scott, Benjamin J., Longmont, CO, Lee, Kyumsung, and Perlmutter, Stephen H., Louisville, CO, for a “collection of uncorrelated entropy during a power down sequence.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Apparatus and method for managing entropy in a cryptographic processing system, such as but not limited to a solid-state drive (SSD). In some embodiments, a processing device is operated to transfer data between a host device and a non-volatile memory (NVM). In response to the detection of a power down event associated with the processing device, entropy associated with the power down event is collected and stored in a memory. Upon a subsequent reinitialization of the processing device, the entropy is conditioned and used as an input to a cryptographic function to subsequently transfer data between the host device and the NVM. In some embodiments, the entropy is obtained from the state of a hardware timer that provides a monotonically increasing count for timing control. In other embodiments, the entropy is obtained from a RAID buffer used to store data to a die set of the NVM.”

The patent application was filed on June 28, 2018, (Appl. No.16/021,823).

Intelligent switching peripheral connector
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,016,919) developed by Yin, Phillip, Fremont, CA, for an “intelligent switching peripheral connector.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”An electrical connector can have a switch module connected to a first interface, a second interface, and a third interface with a computing device connected to the first interface, a first peripheral device connected to the second interface, and a second peripheral device connected to the third interface. The first peripheral device may communicate with the computing device via a first conduit that extends through the switch module prior to the switch module activating a second conduit that extends through the switch module in response to detection of an operational condition of the computing device.”

The patent application was filed on February 22, 2019, (Appl. No.16/282,970).

Storage with enhanced time to ready performance
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,016,889) developed by Benjamin, Daniel John, Savage, MN, Weidemann, Ryan Charles, Victoria, MN, Goss, Ryan James, Prior Lake, MN, Claude, David W., Loveland, CO, and Ferris, Graham David, Savage, MN, for a “storage device with enhanced time to ready performance.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Method and apparatus for enhancing power cycle performance of a storage device, such as a solid-state drive (SSD). In some embodiments, map data that describe the contents of a non-volatile memory (NVM) are arranged as snapshots and intervening journal updates. During a scram interval in which the storage device transitions to a powered down condition, the snapshots and journal updates for primary segments with high client interest are updated prior to storage to the NVM. During a reinitialization interval in which the storage device transitions to a powered up condition, the updated primary segments are loaded, after which the storage device provides the client device with an operationally ready notification. Remaining secondary segments are updated and loaded after the notification. The primary segments are identified based on a detected workload from the client device. Configuration changes can further be made based on the detected workload.”

The patent application was filed on December 13, 2019, (Appl. No.16/714,121).

Storage with read disturb control strategy whereby disturb condition can be predicted
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,016,880) developed by Goss, Ryan James, Prior Lake, MN, Benjamin, Daniel John, Savage, MN, Claude, David W., Loveland, CO, Ferris, Graham David, Savage, MN, and Weidemann, Ryan Charles, Victoria, MN, for a “data storage system with read disturb control strategy whereby disturb condition can be predicted.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A system may consist of a network controller connected between a non-volatile memory and a host with a disturb module connected to the non-volatile memory. A received data write request from a host may prompt the assignment of a first physical block address in the non-volatile memory to a data block of the data write request with the network controller. The data block and first physical block address can each be characterized with the disturb module before the first physical block address is altered to a second block address in the non-volatile memory in response to a disturb strategy generated by the disturb module. The second block address can be selected based on the characterization of the data block and first physical block address with respect to a risk of a disturb condition occurring in the non-volatile memory.”

The patent application was filed on April 28, 2020, (Appl. No.15/929,358).

Distributed storage with initialization-less parity
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,016,848) developed by Lingarajappa, Chetan Bendakaluru, Bangalore, India, for a “distributed data storage system with initialization-less parity.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”In a data storage system with distributed data storage units, initialization-less parity can be practiced with a storage controller connected to a storage memory and multiple data storage units. Data locations of data storage devices of the respective data storage units can be arranged as distributed data storage groups as directed by the storage controller prior to receiving a write request to a distributed data storage group. Unwritten data locations of the distributed data storage group are identified by consulting the storage memory and each unwritten data storage location may be assumed to have a zero value when computing parity data for the distributed data storage group.”

The patent application was filed on November 2, 2017, (Appl. No.15/801,882).

Balanced die set execution in storage
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,016,679) developed by Secatch, Stacey, Niwot, CO, and Claude, David W., Loveland, CO, for a “balanced die set execution in a data storage system.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage system can arrange semiconductor memory into a plurality of die sets where performance metrics of execution of a first data access command to a first die set and of a second data access command to a second die set are measured. A proactive strategy is generated to maintain consistent data access command execution performance with a quality of service module based on the measured performance metrics and a third data access command is altered, as directed by the proactive strategy, to prevent a predicted non-uniformity of data access command performance between the first die set and the second die set.”

The patent application was filed on June 29, 2018, (Appl. No.16/023,420).

Event-based dynamic memory allocation in storage device
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,016,665) developed by Kataria, Abhay T., and Inamdar, Amruta Rameshchandra, Longmont, CO, for an “event-based dynamic memory allocation in a data storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device that includes data storage media, with at least one of the data storage media having a plurality of embedded firmware modules. The data storage media include a non-volatile memory having different usage modes, with each different usage mode being associated with a different status of the data storage device, and each of the different usage modes having different space allocation configurations for data generated by the plurality of embedded firmware modules. A controller communicatively coupled to the non-volatile memory. The controller determines a change in the status of the data storage device and, in response to the change in the status of the data storage device, dynamically alters the usage mode of the non-volatile memory from a first one of the usage modes to a second one of the usage modes.”

The patent application was filed on January 23, 2018, (Appl. No.15/877,710).

Near field transducers including electrodeposited plasmonic materials and methods of forming
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,015,256) developed by Lee, Lien, St. Paul, MN, Gong, Jie, Eden Prairie, MN, Venkatasamy, Venkatram, Edina, MN, Zhao, Yongjun, Zou, Lijuan, Eden Prairie, MN, Hong, Dongsung, Tabakovic, Ibro, Edina, MN, and Ostrowski, Mark, Lakeville, MN, for “near field transducers including electrodeposited plasmonic materials and methods of forming.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Methods of forming near field transducers (NFTs) including electrodepositing a plasmonic material.”

The patent application was filed on October 15, 2018, (Appl. No.16/160,671).

Patterned thermal absorption layer for granular storage media
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,011,203) developed by Chang, Thomas Y., Menlo Park, CA, Steiner, Philip L., Los Altos, CA, and Jones, Paul M., Palo Alto, CA, for a “patterned thermal absorption layer for granular storage media.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A heat-assisted magnetic recording device includes a granular magnetic recording layer and a thermal absorption layer formed on top of the magnetic recording layer. The thermal absorption layer is patterned to include rows extending in a cross-track direction of the magnetic media, each adjacent pair of the rows being separated from one another by an insulating material.”

The patent application was filed on April 30, 2020, (Appl. No.16/863,583).

Heatsink structures for heat-assisted magnetic recording heads
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,011,201) developed by Habibi, Helene Parwana, Bance, Simon, Londonderry, Great Britain, McGarry, Martin Liam, Ballymena, Great Britain, Andruet, Raul Horacio, Woodbury, MN, Blaber, Martin Giles, Minneapolis, MN, Chen, Weibin, Edina, MN, Duda, John Charles, Bloomington, MN, Gubbins, Mark Anthony, Donegal, Ireland, Hutchinson, Erik Jon, Eden Prairie, MN, Krishnamurthy, Vivek, Edina, MN, Seigler, Michael Allen, Eden Prairie, MN, and Wang, Chen, Bloomington, MN, for “heatsink structures for heat-assisted magnetic recording heads.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A recording head comprises a write pole extending to an air-bearing surface. A near-field transducer is positioned proximate a first side of the write pole in a down-track direction. A heatsink structure is proximate the near-field transducer and positioned between the near-field transducer and the write pole. The heatsink structure extends beyond the near-field transducer in a cross-track direction and extends in a direction normal to the air-bearing surface.”

The patent application was filed on July 24, 2019, (Appl. No.16/520,629).

Split contact sensor for HAMR slider
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,011,191) developed by Hutchinson, Erik Jon, Macken, Declan, Eden Prairie, MN, and Anaya-Dufresne, Manuel Charles, Edina, MN, for a “split contact sensor for a heat-assisted magnetic recording slider.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”An apparatus comprises a slider having an air bearing surface, ABS, a leading edge, and a trailing edge opposing the leading edge. A writer having a write pole is situated at or near the ABS. A near-field transducer (NFT) is situated at or near the ABS and between the write pole and the leading edge of the slider. An optical waveguide is configured to couple light from a laser source to the NFT. A contact sensor is situated between the write pole and the trailing edge. The contact sensor comprises a first ABS section situated at or near the ABS, a second ABS section situated at or near the ABS and spaced apart from the first ABS in a cross-track direction by a gap, and a distal section extending away from the ABS and connecting the first ABS section with the second ABS section.”

The patent application was filed on April 21, 2020, (Appl. No.16/854,403).

Readback waveform oversampling
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,011,189) developed by Mader, Drew Michael, Minneapolis, MN, and Zhu, Wenzhong, Apple Valley, MN, for “readback waveform oversampling method and apparatus.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A read channel is configured to obtain an analog readback waveform from a magnetic recording medium of a disk drive at a sampling rate of one sample per one written bit. A buffer is coupled the read channel. Circuitry is configured to inject a plurality of different phase offsets into the read channel for each of a plurality of revolutions of the medium. The circuitry is also configured to store, in a buffer, an amplitude of the readback waveform for each of the different phase offsets. The circuitry is further configured to generate an oversampled readback waveform using the amplitudes stored in the buffer.”

The patent application was filed on April 21, 2020, (Appl. No.16/854,377).

External storage that expands storage capability of host
Seagate Technology LLC, Fremont, CA, has been assigned a patent (11,005,842) developed by Buddhavaram, Chandra Shaker, Fremont, CA, and Ruster, Jean-Pierre, San Jose, CA, for an “external storage device that expands a data storage capability of a host device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method includes receiving a request from a host device to authenticate a device. The method further includes transmitting authenticating data to the host device. Responsive to successful authentication of the device, configuration interface and communication interface of the device is exposed to the host device. The method further includes processing commands from the host device after the device is successfully authenticated. Responsive to the processed commands, payload data is sent or received to or from the host device according to the communication interface.”

The patent application was filed on December 22, 2017, (Appl. No.15/852,944).