Samsung Electronics Assigned Twenty-Five Patents

Memory with read-write-read memory controller
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,056,187) developed by Na, Tae Hui, Seoul, Korea, Park, Mu Hui, Lee, Kwang Jin, and Lee, Yong Jun, Hwaseong-si, Korea, for a “memory device with read-write-read memory controller.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory device includes a memory cell array including a plurality of memory cells, each of the plurality of memory cells having a switch element, and a data storage element connected to the switch element and containing a phase-change material, and a memory controller for obtaining first read voltages from the plurality of memory cells, inputting a first write current to the plurality of memory cells, and then, obtaining second read voltages from the plurality of memory cells, wherein the memory controller compares the first read voltage of a first memory cell of the plurality of memory cells to the second read voltage of the first memory cell to determine a state of the first memory cell.”

The patent application was filed on July 13, 2018 (Appl. No.16/034,921).

Storage performing peer-to-peer communication with external device without intervention of host
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,055,251) developed by Shim, Hojun, Yongin-si, Korea, for a “storage device performing peer-to-peer communication with external device without intervention of host.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device is provided. The storage device includes a field programmable gate array board connected to a first port of the storage device, and a storage controller including a first interface circuit and a second interface circuit. The first interface circuit is connected to the FPGA board, the second interface circuit is connected to a second port of the storage device, at least one port from among the first port and the second port being configured to connect to an external storage device, and the FPGA board is configured to provide a path for transferring data in a peer-to-peer manner between the storage controller and the external storage device without intervention of a host.”

The patent application was filed on April 20, 2020 (Appl. No.16/853,373).

Accelerating tasks during storage caching/tiering in computing environment
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,055,218) developed by Joshi, Kanchan, and Vishnoi, Suresh, Bangalore, India, for “apparatus and methods for accelerating tasks during storage caching/tiering in a computing environment.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”An apparatus for accelerating tasks during storage caching and tiering includes a processor. First and second storage units are coupled to the processor. A memory unit is coupled to the processor. The memory unit is configured to receive a write data operation. An amount of dirty data in the first storage unit is determined based on the received write data operation. The dirty data includes data present in the first storage unit to be synced to the second storage unit. A sync rate associated with a read data operation from the first storage unit to the second storage unit is decelerated when the amount of dirty data is less than a first threshold value. A write rate associated with a write data operation to the first storage unit is accelerated when the amount of dirty data is less than the first threshold value.”

The patent application was filed on May 24, 2019 (Appl. No.16/422,253).

Storage device
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,055,011) developed by Kim, Hee Sung, Seoul, Korea, and Shin, Hyun Wook, Yongin-si, Korea, for a “storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes a first nonvolatile memory device, a second nonvolatile memory device, and a data line. The second nonvolatile memory device is of a different type from the first nonvolatile memory device. The data line is shared by the first nonvolatile memory device and the second nonvolatile memory device. First data is simultaneously provided to the first nonvolatile memory device and the second nonvolatile memory device through the data line, the first data is written to the second nonvolatile memory device, and the first data is reprogrammed into the first nonvolatile memory device by reading the first data from the second nonvolatile memory device and providing the read first data to the first nonvolatile memory device.”

The patent application was filed on February 24, 2020 (Appl. No.16/799,360).

User device including storage device and trim management
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,048,662) developed by Kim, Kyung Ho, Seoul, Korea, Jeong, Seungyeun, Anseong-si, Korea, Kim, Dae-Jin, Hwaseong-si, Korea, Oh, Sang-Jin, Suwon-si, Korea, Lee, Hwasoo, Bucheon-si, Korea, and Jang, Hyejeong, Yongin-si, Korea, for an “user device including storage device and trim management method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A trim management method for a storage device includes activating, by a processor configured by an application program, a pattern check function of a device driver, requesting, by the processor configured by the application program, a file system to write a file of a specified pattern, converting, by the processor configured by the file system, the file to management unit data of the storage device, transmitting, by the processor configured by the file system, the management unit data to the device driver, checking, by the processor configured by the device driver, whether a data pattern of the management unit data is the same as the specified pattern, and transmitting, by the processor configured by the device driver, a trim command for trimming a storage area corresponding to the management unit data, to the storage device based on results of the checking.”

The patent application was filed on June 1, 2017 (Appl. No.15/610,810).

Memory module and operation method of host
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,048,645) developed by Lim, Sun-Young, Hwaseong-si, Korea, Niu, Dimin, Sunnyvale, CA, and Lee, Jae-Gon, Seoul, Korea, for “memory module, operation method therof, and operation method of host.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory module includes a random access memory (RAM) device that includes a first storage region and a second storage region, a nonvolatile memory device, and a controller that controls the RAM device or the nonvolatile memory device under control of a host. The controller includes a data buffer that temporarily stores first data received from the host, and a buffer returning unit that transmits first release information to the host when the first data are moved from the data buffer to the first storage region or the second storage region of the RAM device and transmits second release information to the host when the first data are moved from the second storage region to the nonvolatile memory device.”

The patent application was filed on August 14, 2018 (Appl. No.16/103,058).

Methods for multi-stream garbage collection
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,048,624) developed by Fischer, Stephen G., Mountain View, CA, Choi, Changho, San Jose, CA, Martineau, Jason, Milpitas, CA, and Pandurangan, Rajinikanth, Fremont, CA, for “methods for multi-stream garbage collection.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A Solid State Drive (SSD) is disclosed. The SSD may include storage for data and a host interface logic to receive requests from a host machine. The SSD may also include an SSD controller to manage reading data from and writing data to the storage responsive to the requests. The SSD controller may include a flash translation layer to translate logical addresses to physical addresses, a garbage collection logic to perform garbage collection on an erase block that includes a valid page, a stream logic to manage stream characteristics for the data in the valid page, and a restreamer logic to assign the valid page to a new block based on the stream characteristics.”

The patent application was filed on November 22, 2017 (Appl. No.15/821,708).

Storage device telemetry for provisioning I/O
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,048,581) developed by Sinha, Vikas K., Sunnyvale, CA, Joshi, Indira, Saratoga, CA, and Fischer, Stephen G., Mountain View, CA, for a “storage device telemetry for provisioning I/O.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A system and method for advanced storage device telemetry. The system includes multiple SSDs. I/O is executed on the SSDs in conjunction with a host software. As the I/O is executed, error log information is stored in a persistent memory as well as in a volatile memory. In various embodiments, granular performance information for the execution of the I/O is also stored in a persistent memory.”

The patent application was filed on January 16, 2018 (Appl. No.15/872,927).

VM-aware FTL design for SR-IOV NVMe SSD
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,048,541) developed by Qiu, Sheng, San Jose, CA, and Ki, Yang Seok, Palo Alto, CA, for a “VM-aware FTL design for SR-IOV NVMe SSD.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A mass storage device for providing persistent storage. The system includes a plurality of instances of virtual flash translation layers, each associated with a namespace and configured to provide, to one or more virtual machines executing in a host connected to the mass storage device, access to read and write operations in the persistent storage.”

The patent application was filed on February 4, 2019 (Appl. No.16/266,848).

Control plane for providing erasure code protection across multiple storage
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,042,442) developed by Olarig, Sompong Paul, Pleasanton, CA, Schwaderer, David, Saratoga, CA, and Kachare, Ramdas P., Cupertino, CA, for “control plane method and apparatus for providing erasure code protection across multiple storage devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A system and method for providing erasure code protection across multiple storage devices. A data switch in a storage system connects a plurality of storage devices to a remote host. Each storage device is also connected to a controller, e.g., a baseboard management controller. During normal operation, read and write commands from the remote host are sent to respective storage devices through the data switch. When a write command is executed, the storage device executing the command sends a copy of the data to the controller, which generates and stores erasure codes, e.g., on a storage device that is dedicated to the storage of erasure codes, and invisible to the remote host. When a device fails or is removed, the controller reconfigures the data switch to redirect all traffic addressed to the failed or absent storage device to the controller, and the controller responds to host commands in its stead.”

The patent application was filed on February 28, 2019 (Appl. No.16/289,257).

Distributed storage
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,042,330) developed by Marripudi, Gunneswara, Fremont, CA, and Kanteti, Kumar, Mountain View, CA, for “methods and systems for distributed data storage.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Provided is a method of storing data in a distributed environment including a plurality of storage devices, the method including: receiving a request to store the data, calculating a hash value by applying a hashing function to a value associated with the data, splitting the hash value into a plurality of weights, each weight corresponding to one of a plurality of chunks, selecting a chunk of the plurality of chunks based on the weight, and storing the data in a corresponding storage device, the corresponding storage device corresponding to the selected chunk.”

The patent application was filed on May 8, 2017 (Appl. No.15/589,833).

Storage for autonomous space compaction
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,042,328) developed by Choi, Inseok Stephen, Redwood City, CA, Ki, Yang Seok, Palo Alto, CA, and Qiu, Sheng, San Jose, CA, for “storage apparatus and method for autonomous space compaction.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Embodiments of the inventive concept improve performance, energy efficiency, and capacity of storage solutions, for example, by reducing the data movement between the CPU and the storage device and increasing the available capacity of the underlying storage devices via in-storage support for data compaction. Embodiments include a storage apparatus and method for autonomous in-storage space compaction initiated by a host-side command and according to metadata specified by a host. A space compact engine can function as an independent module or logic section within a storage device, which can migrate data within the storage device, thereby freeing up capacity and making preexisting data more compact. The space compact engine can cause self compact operations, self compact and trim operations, move and compact operations, and/or merge and compact operations. The space compact engine can notify the host of the completion of the operations.”

The patent application was filed on December 19, 2018 (Appl. No.16/226,624).

Semiconductor integrated circuit cards and communication systems
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,037,042) developed by Seo, Hui-Kwon, Suwon-si, Korea, for “semiconductor integrated circuit cards and communication systems including the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor integrated card includes an external package, a subscriber identification module (SIM) circuit, a plurality of SIM pins, a storage device and a plurality of memory pins. The SIM circuit is formed inside of the external package and is configured to store subscriber information. The SIM pins are formed on a surface of the external package and are electrically connected to the SIM circuit. The storage device is formed inside of the external package and is separated from the SIM circuit. The storage device includes a nonvolatile memory device. The memory pins are formed on the surface of the external package and are electrically connected to the storage device.”

The patent application was filed on October 11, 2019 (Appl. No.16/599,160).

Heterogeneous distributed file using different types of storage mediums
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,036,691) developed by Lee, Jaehwan, Fremont, CA, and Ki, Yang Seok, Palo Alto, CA, for a “heterogeneous distributed file system using different types of storage mediums.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”According to one general aspect, a system may include a plurality of data nodes. Each data node may include either or both of a first storage medium and a second storage medium that is slower than the first storage medium. Each data node may be configured to store a piece data in either the first storage medium or the second storage medium. The system may be configured to store a plurality of copies of an active piece of data within two or more data nodes. A fast copy of the active piece of data may be stored by a first storage medium of a first data node. One or more slow copies of the active piece of data may be stored by respective second storage mediums of one or more respective other data nodes.”

The patent application was filed on January 11, 2019 (Appl. No.16/246,394).

Mechanism to dynamically allocate physical storage device resources in virtualized environments
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,036,533) developed by Pinto, Oscar P., San Jose, CA, for a “mechanism to dynamically allocate physical storage device resources in virtualized environments.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device is disclosed. The storage device may include storage for data and at least one Input/Output (I/O) queue for requests from at least one virtual machine (VM) on a host device. The storage device may support an I/O queue creation command to request the allocation of an I/O queue for a VM. The I/O queue creation command may include an LBA range attribute for a range of Logical Block Addresses (LBAs) to be associated with the I/O queue. The storage device may map the range of LBAs to a range of Physical Block Addresses (PBAs) in the storage.”

The patent application was filed on April 20, 2018 (Appl. No.15/959,108).

Storage and methods of operating storage
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,036,425) developed by Lee, Su-Ryun, Suwon-si, Korea, and Lee, Bum-Hee, Hwaseong-si, Korea, for “storage devices, data storage systems and methods of operating storage devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes a main storage and a storage controller to control the main storage. The main storage stores data and includes a plurality of nonvolatile memory devices. The storage controller loads at least one of (a) at least a portion of mapping tables and (b) at least one of a portion of directories to a host memory buffer included in an external host device, based on at least one of a size of the host memory buffer and locality information associated with a data access pattern of the host device. The mapping tables are stored in the nonvolatile memory devices and the mapping tables indicate a mapping relationship between a physical address and a logical address of corresponding ones of the nonvolatile memory devices. The directories store address information of the mapping tables.”

The patent application was filed on July 9, 2019 (Appl. No.16/506,793).

Unified addressing and hierarchical heterogeneous storage and memory
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,036,397) developed by Haghighi, Siamack, Sunnyvale, CA, and Brennan, Robert, Santa Clara, CA, for “unified addressing and hierarchical heterogeneous storage and memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”According to one general aspect, an apparatus may include a processor, a heterogeneous memory system, and a memory interconnect. The processor may be configured to perform a data access on data stored in a memory system. The heterogeneous memory system may include a plurality of types of storage mediums. Each type of storage medium may be based upon a respective memory technology and may be associated with one or more performance characteristics. The heterogeneous memory system may include both volatile and non-volatile storage mediums. The memory interconnect may be configured to route the data access from the processor to at least one of the storage mediums based, at least in part, upon the one or more performance characteristic associated with the respective memory technologies of the storage media.”

The patent application was filed on August 16, 2019 (Appl. No.16/543,511).

Nonvolatile memory and method for fabricating
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,031,410) developed by Park, Se Jun, Yongin-si, Korea, Yu, Min-Tai, Seoul, Korea, and Lee, Jae Duk, Seongnam-si, Korea, for “nonvolatile memory device and method for fabricating the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A nonvolatile memory device in which reliability is improved and a method for fabricating the same are provided. The nonvolatile memory device includes a mold structure which includes a first insulating pattern, a first gate electrode and a second insulating pattern sequentially stacked on a substrate, a semiconductor pattern which penetrates the mold structure, is connected to the substrate, and extends in a first direction, a first charge storage film extending in the first direction between the first insulating pattern and the second insulating pattern and between the first gate electrode and the semiconductor pattern, and a blocking insulation film between the first gate electrode and the first charge storage film, wherein a first length at which the first charge storage film extends in the first direction is longer than a second length at which the blocking insulation film extends in the first direction.”

The patent application was filed on May 29, 2019 (Appl. No.16/425,365).

Providing security protection for FPGA based SSD
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,030,316) developed by Olarig, Sompong Paul, Pleasanton, CA, Wu, Wentao, and Martineau, Jason, Milpitas, CA, for “system and method for providing security protection for FPGA based solid state drives.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”According to some example embodiments, a method for providing security to a storage device includes receiving, by the storage device, a public key via a network, sending, by the storage device, the received public key and a proposed configuration corresponding to the storage device to a security manager that resides in a control plane of the network, determining, by the security manager, whether the public key received from the storage device matches a private key available to the security manager, downloading, by the security manager, the proposed configuration to the storage device, determining, by the security manager, if the proposed configuration is successfully downloaded to the storage device, operating the storage device according to the downloaded configuration, and granting, by the security manager, a request to lease the storage device operating in the downloaded configuration for a time interval.”

The patent application was filed on November 20, 2018 (Appl. No.16/197,237).

Storage including NVM and controller
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,029,893) developed by Yeon, Jesuk, Hwaseong-si, Korea, Kim, Seontaek, Suwon-si, Korea, Park, Young-Ho, Anyang-si, Korea, Choi, Eun Ju, Hwaseong-si, Korea, and Lee, Yonghwa, Seoul, Korea, for “storage device including nonvolatile memory device and controller, controller and operating method of nonvolatile memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes a nonvolatile memory device, and a controller configured to, sequentially receive first read commands and a first write command, the first write command being associated with first write data, slice the first write command to generate a plurality of sub-commands, slice the first write data to generate a plurality of sub-data elements, and alternately transmit, to the nonvolatile memory device, at least one read command of the first read commands, and one sub-command of the plurality of sub-commands and one sub-data element of the plurality of sub-data elements.”

The patent application was filed on May 3, 2018 (Appl. No.15/970,237).

Page size synchronization and page size aware scheduling method for NVM dual in-line memory module (NVDIMM) over memory channel
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,029,879) developed by Niu, Dimin, Sunnyvale, CA, Chang, Mu Tien, San Jose, CA, Zheng, Hongzhong, Los Gatos, CA, Lim, Sun Young, Lee, Jae-Gon, and Kim, Indong, Gyeonggi-do, Korea, for “page size synchronization and page size aware scheduling method for non-volatile memory dual in-line memory module (NVDIMM) over memory channel.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method of page size aware scheduling and a non-transitory computer-readable storage medium having recorded thereon a computer program for executing the method of page size aware scheduling are provided. The method includes determining a size of a media page, determining if the media page is open or closed, performing, by a memory controller, a speculative read operation if the media page is determined to be open, and performing, by the memory controller, a regular read operation if the media page is determined to be closed.”

The patent application was filed on April 10, 2018 (Appl. No.15/949,934).

Storage device with expandable logical address space
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,029,873) developed by Song, Jaewon, Goyang-si, Korea, Kim, Jaesub, Seoul, Korea, and Jang, Sejeong, Hwaseong-si, Korea, for a “storage device with expandable logical address space and operating method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method of operating a storage device with a memory includes partitioning an entire area of a first namespace into at least one area based on a reference size. The partitioning is performed in response to a namespace creating request from a host that includes size information corresponding to the entire area of the first namespace. The method further includes partitioning a logical address space of the memory into a plurality of segments, allocating a first segment of the plurality of segments to a first area of the at least one area, and storing mapping information of the first area and the first segment. A size of the logical address space is greater than a size of a physical storage space of the memory identified by the host.”

The patent application was filed on August 19, 2019 (Appl. No.16/543,800).

Nonvolatile memory including two-dimensional material
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,024,748) developed by Lee, Jaeho, Seoul, Korea, Kim, Haeryong, Seongnam-si, Korea, Jo, Sanghyun, Seoul, Korea, and Shin, Hyeonjin, Suwon-si, Korea, for “nonvolatile memory device including two-dimensional material and apparatus including the nonvolatile memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Provided are nonvolatile memory devices including 2-dimensional (2D) material and apparatuses including the nonvolatile memory devices. A nonvolatile memory device may include a storage stack including a plurality of charge storage layers between a channel element and a gate electrode facing the channel element. The plurality of charge storage layers may include a 2D material. An interlayer barrier layer may be further provided between the plurality of charge storage layers. The nonvolatile memory device may have a multi-bit or multi-level memory characteristic due to the plurality of charge storage layers.”

The patent application was filed on February 9, 2018 (Appl. No.15/892,850).

Supporting multi-mode and/or multi-speed non-volatile memory (NVM) express (NVMe) over fabrics (NVMe-oF) devices
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,016,924) developed by Olarig, Sompong Paul, Pleasanton, CA, and Worley, Fred, San Jose, CA, for “system and method for supporting multi-mode and/or multi-speed non-volatile memory (NVM) express (NVMe) over fabrics (NVMe-oF) devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”According to some example embodiments, a system includes: at least one motherboard, at least one baseboard management controller (BMC) a mid-plane, and at least one storage device, wherein the at least one storage device is configured to operate in a first mode or a second mode based on a first input received from the at least one motherboard or the at least one BMC via a plurality of device ports over the mid-plane, and when operating in the second mode, the at least one storage device is configured to operate in a first speed from a plurality of operating speeds based on a second input received from the mid-plane via the plurality of device ports.”

The patent application was filed on June 13, 2018 (Appl. No.16/007,949).

NVM express over fabric messages between host and target using burst mode
Samsung Electronics Co., Ltd., Suwon-si, Korea, has been assigned a patent (11,016,911) developed by Balasubramani, Muthazhagan, Tamilnadu, India, Chinmay, Chirag, Odisha, India, Nimmagadda, Venkataratnam, Karnataka, Inndia, and Johnson, Raphel David, Bangalore, India, for a “non-volatile memory express over fabric messages between a host and a target using a burst mode.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Systems and methods for managing transfer of NVMeoF commands/responses between a host and a target are described. The systems and methods may initiate and convert at least one Input/Output request into at least one Non-Volatile Memory Express over Fabric (NVMeoF) command to access a storage device attached with the target device. A host may transmit the at least one NVMeoF command in a burst mode using a Remote Direct Memory Access (RDMA) Write packet to a pre-registered memory region of the target device. In response to reception of the at least one NVMeoF command, the target device may post at least one NVMeoF completion response corresponding to the at least one NVMeoF command using the RDMA Write packet to a pre-registered memory region of the host.”

The patent application was filed on August 23, 2019 (Appl. No.16/549,476).