R&D: Van der Waals Engineering of Ferroelectric Heterostructures for Long-Retention Memory
Promising direction to improve ferroelectronic memory performance and reliability for future applications
This is a Press Release edited by StorageNewsletter.com on July 9, 2021 at 2:30 pmNature Communications has published an article written by Xiaowei Wang, Chao Zhu, Ya Deng, Ruihuan Duan, Jieqiong Chen, Qingsheng Zeng, Jiadong Zhou, Qundong Fu, School of Materials Science and Engineering, Nanyang Technological University, Singapore, Singapore, Lu You, Jiangsu Key Laboratory of Thin Films, School of Physical Science and Technology, Soochow University, Suzhou, China, Song Liu, James H. Edgar, Tim Taylor Department of Chemical Engineering, Durland Hall, Kansas State University, Manhattan, KS, USA, Peng Yu,School of Materials Science and Engineering, State Key Laboratory of Optoelectronic Materials and Technologies, Sun Yat-sen University, Guangzhou, China, and Zheng Liu, School of Materials Science and Engineering, Nanyang Technological University, Singapore, Singapore, CINTRA CNRS/NTU/THALES, UMI 3288, Research Techno Plaza, Singapore, Singapore, and Centre for Micro-/Nano-electronics (NOVITAS), School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Singapore.
Abstract: “The limited memory retention for a ferroelectric field-effect transistor has prevented the commercialization of its nonvolatile memory potential using the commercially available ferroelectrics. Here, we show a long-retention ferroelectric transistor memory cell featuring a metal-ferroelectric-metal-insulator-semiconductor architecture built from all van der Waals single crystals. Our device exhibits 17 mV dec−1 operation, a memory window larger than 3.8 V, and program/erase ratio greater than 107. Thanks to the trap-free interfaces and the minimized depolarization effects via van der Waals engineering, more than 104 cycles endurance, a 10-year memory retention and sub-5 μs program/erase speed are achieved. A single pulse as short as 100 ns is enough for polarization reversal, and a 4-bit/cell operation of a van der Waals ferroelectric transistor is demonstrated under a 100 ns pulse train. These device characteristics suggest that van der Waals engineering is a promising direction to improve ferroelectronic memory performance and reliability for future applications.“