R&D: Experimentally Calibrated Electro-Thermal Modeling of Temperature Dynamics in Memristors
Demonstrated thermal crosstalk in array of memristors to illustrate localized heating; model will guide system design by considering thermal performance, critical to most future electronic chips.
This is a Press Release edited by StorageNewsletter.com on May 5, 2021 at 2:31 pmApplied Physics Letters has published an article written by Wenqing Shen, G.W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, Georgia 30332, USA, Suhas Kumar, Hewlett Packard Labs, Palo Alto, California 94304, USA, and Sandia National Laboratories, Livermore, California 94550, USA, and Satish Kumar, G.W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, Georgia 30332, USA.
Abstract: “As nanoscale electronic devices are being packed into dense three-dimensional arrays, the effects of the thermal environment of the system during device operation become critical, but are not clearly understood. Predicting the temperature evolution using a robust model will provide critical design guidelines for complex memory and computing systems. Here, we used in-operando thermal and x-ray mapping with sub-micrometer spatial and sub-microsecond temporal resolutions on functioning tantalum oxide memristive switches and observed hot spots corresponding to oxygen concentration gradients, indicating the presence of localized conductive filaments. We constructed a hybrid electro-thermal model comprising 3D heat transfer and 0D resistive switching models to predict electrical characteristics and the temperature rise and calibrated it against the measurements. We also demonstrated thermal crosstalk in an array of memristors to illustrate localized heating. Such a model will guide system design by considering thermal performance, which is critical to most future electronic chips.“











