Kioxia Assigned Fifteen Patents

Manufacturing semiconductor
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,985,027) developed by Gawase, Akifumi, Kuwana, Japan, Matsui, Yukiteru, Nagoya, Japan, and Sakashita, Mikiya, Nagoya, Japan, for a “method for manufacturing semiconductor device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method for manufacturing a semiconductor device according to an embodiment includes: forming a first layer on a semiconductor substrate, a surface of the first layer having a first plane of which distance from the semiconductor substrate is a first distance and a second plane of which distance from the semiconductor substrate is a second distance smaller than the first distance, and a difference between the first distance and the second distance being 30 nm or more, performing planarization processing on the first layer to have the difference of less than 30 nm, forming a second layer directly on the first layer after performing the planarization processing, supplying a resist to the second layer, bringing a template having a pattern into contact with the resist to form a resist layer to which the pattern has been transferred, and etching the second layer using the resist layer as a mask.”

The patent application was filed on March 17, 2020 (Appl. No.16/820,888).

Semiconductor storage device
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,984,858) developed by Date, Hiroki, Chigasaki, Japan, for a “semiconductor storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor storage device includes: a voltage generation circuit configured to generate a read voltage to be supplied to a selected word line to which a read-target memory cell transistor is connected and a read-pass voltage to be supplied to an adjacent word line, a word line driver configured to, when the read voltage transitions, apply the read voltage to the selected word line with a first kick voltage amount and apply the read-pass voltage to the adjacent word line with a second kick voltage amount, and a control circuit configured to set each of the first kick voltage amount and the second kick voltage amount to a voltage corresponding to an amount of the transition.”

The patent application was filed on February 10, 2020 (Appl. No.16/785,752).

Semiconductor memory
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,978,166) developed by Nagao, Osamu, Kanagawa, Japan, for a “semiconductor memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor memory device includes memory cells, a word line, and a controller. The controller is configured to: execute a first program operation in which a first program voltage is applied to the word line, execute a second program operation in which the first program voltage is applied to the word line, when a resumed first verify operation ends, and execute a third program operation in which a second program voltage higher than the first program voltage is applied to the word line, after a resumed second verify operation.”

The patent application was filed on January 28, 2020 (Appl. No.16/775,151).

Semiconductor storage
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,964,377) developed by Kimura, Keita, Nakai, Kenri, Fujisawa Kanagawa, Japan, and Sako, Mario, Yokohama Kanagawa, Japan, for a “semiconductor storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor storage device includes first, second, and third transistors, first, second, and third bit lines connected to the first, second, and third transistors, a word line connected to the first, second, and third transistors, and a control circuit configured to perform a program operation for writing data to the second and third transistors, including raising a first voltage applied to the first bit line at a first timing, raising a second voltage applied to the word line at a second timing, raising a third voltage applied to the second bit line at a third timing, raising a fourth voltage applied to the third bit line at a fourth timing, and lowering the first voltage at a fifth timing. The first voltage is raised to a first predetermined voltage, and each of the third and fourth voltages is raised to a second predetermined voltage smaller than the first predetermined voltage.”

The patent application was filed on March 2, 2020 (Appl. No.16/807,078).

Memory system
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,957,400) developed by Horisaki, Koji, Horiuchi, Kazuhisa, Yamaki, Ryo, Park, Gibeom, and Ng, Youyang, Yokohama Kanagawa, Japan, for a “memory system.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory controller performs a reference read on a plurality of memory cells using reference read voltages, generates a histogram indicating the number of memory cells in different threshold voltage bins based on results of the reference read, estimates actual read voltages based on the histogram and a first estimation function, and reads data using the actual read voltages. When reading of the data with the actual read voltages estimated using the first estimation function fails, the memory controller estimates actual read voltages using a second estimation function different from the first estimation function and reads the data with the actual read voltages estimated using the second estimation function.”

The patent application was filed on February 26, 2020 (Appl. No.16/802,477).

Semiconductor storage
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,956,092) developed by Fujino, Yorinobu, Kanagawa, Japan, and Hatsuda, Kosuke, Tokyo, Japan, for a “semiconductor storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor storage device comprises first and second memory cells each including a variable-resistance element, a write driver, and a control circuit that concurrently performs an operation to read first data in the first memory cell and second data in the second memory cell, the operation to read the first data including a first write operation for a first time length and the operation to read the second data including a second write operation for a second time length. In the first write operation, the write driver applies, to the first memory cell, a first voltage for a third time length and a second voltage different from the first voltage for a fourth time length. In the second write operation, the write driver applies the first voltage to the second memory cell for a fifth time length longer than the third time length and longer than the fourth time length.”

The patent application was filed on February 26, 2020 (Appl. No.16/802,454).

Memory and controlling non-volatile memory
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,951,238) developed by Watanabe, Daiki, Yokohama, Japan, for “memory system and method for controlling non-volatile memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory system of an embodiment includes a non-volatile memory and a memory controller. The memory controller generates an error correction code including a first and second symbol groups. The first symbol group is a set of symbols shared between a first component code and a third component code and/or a fourth component code. The second symbol group is a set of symbols shared between a second component code and the third component code and/or the fourth component code. The first and third component codes have a lower correction capability than the second and fourth component codes, respectively. The ratio of symbols protected by the third component code is smaller in the second symbol group than in the first symbol group. The ratio of symbols protected by the fourth component code is larger in the second symbol group than in the first symbol group.”

The patent application was filed on February 20, 2020 (Appl. No.16/795,657).

Semiconductor integrated circuit, transmission device, and memory
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,951,198) developed by Iijima, Hiroaki, Yokohama, Japan, for “semiconductor integrated circuit, transmission device, and memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”According to one embodiment, a semiconductor integrated circuit includes a clock supply circuit, a first output circuit, and a second output circuit. The clock supply circuit outputs a first clock and a second clock, the first clock having a first period, the second clock having a second period that is 1/m times the first period. The m is a natural number of 2 or more. The first output circuit outputs a first signal indicating content of data to an outside when a first operation is performed and outputs a second signal having a toggle pattern based on the first clock to the outside when a second operation is performed. The second output circuit outputs an operation clock based on the first clock to the outside when the first operation is performed and outputs a sampling clock based on the second clock to the outside when the second operation is performed.”

The patent application was filed on February 20, 2020 (Appl. No.16/795,677).

Semiconductor memory
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,950,307) developed by Tokiwa, Naoya, Fujisawa Kanagawa, Japan, for a “semiconductor memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor memory device includes memory cells, a first circuit that includes a first latch group including first and second data latch circuits and a second latch group including third and fourth data latch circuits, and a control circuit configured to control a write operation during which first and second data to be written into the memory cells are stored in the first and second data latch circuits, respectively, wherein the first and second data are also stored in the third and fourth data latch circuits, respectively, while the first and second data stored in the first and second data latch circuits, respectively, are being written in the memory cells.”

The patent application was filed on February 26, 2020 (Appl. No.16/802,446).

Semiconductor storage
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,949,132) developed by Tanaka, Reika, Kanagawa, Japan, Miyazaki, Takayuki, Tokyo, Japan, and Saitoh, Masumi, Kanagawa, Japan, for a “semiconductor storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes a substrate, first wirings arranged in a first direction and extending in a second direction, second wirings arranged in the second direction and extending in the first direction, resistance portions between the first and second wirings, third wirings between the second wirings and the substrate, arranged in the second direction and extending in a third direction, semiconductor portions each connected to second and third wirings, a fourth wiring extending in the second direction and facing the semiconductor portions, insulating portions between the semiconductor portions and the fourth wiring, and a contact connected to each first wiring. The semiconductor portions include a first portion and a second portion closer to the contact, and a length in the second direction of an insulating portion between the first portion and the fourth wiring is greater than that of another insulating portion between the second portion and the fourth wiring.”

The patent application was filed on February 27, 2020 (Appl. No.16/803,883).

Nonvolatile semiconductor memory and manufacturing method
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,916,559) developed by Kito, Masaru, Yokohama, Japan, Aochi, Hideaki, Kawasaki, Japan, Katsumata, Ryota, Nitayama, Akihiro, Yokohama, Japan, Kidoh, Masaru, Kawasaki, Japan, Tanaka, Hiroyasu, Tokyo, Japan, Fukuzumi, Yoshiaki, Matsuoka, Yasuyuki, and Sato, Mitsuru, Yokohama, Japan, for “Nonvolatile semiconductor memory device and manufacturing method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor, a first insulation film formed around the pillar shaped semiconductor, a charge storage layer formed around the first insulation film, the second insulation film formed around the charge storage layer, and first or nth electrodes formed around the second insulation film, n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.”

The patent application was filed on January 11, 2019 (Appl. No.16/245,271).

Memory system and nonvolatile memory
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,910,068) developed by Takizawa, Kazutaka, Kojima, Yoshihisa, Kanagawa, Japan, and Niijima, Masaaki, Tokyo, Japan, for “memory system and nonvolatile memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory system includes a nonvolatile memory and a controller. The nonvolatile memory includes memory cells at intersection locations of stacked word lines and a memory pillar passing through the word lines in a stacking direction, the word lines including a first group of word lines stacked above a second group of word lines. The controller reads data of a first memory cell in a first read mode and reads data of a second memory cell in a second read mode. The first memory cell is, and the second memory cell is not, at an intersection location of a word line that is in a boundary area of the first and second groups of word lines and the memory pillar. The boundary area is adjacent to a location of the memory pillar where a width of the memory pillar discontinuously changes along the stacking direction.”

The patent application was filed on December 26, 2019 (Appl. No.16/727,488).

Semiconductor defect inspection
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,890,539) developed by Shirakawa, Hiroaki, Yokkaichi Mie, Japan, and Yoshino, Kiminori, Kuwana Mie, Japan, for a “semiconductor defect inspection apparatus.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor defect inspection apparatus for inspecting a specimen including a semiconductor substrate having a surface on which a predetermined pattern is formed, includes an excitation light irradiator, a polarization converter, a detector, and a defect analysis detector. The excitation light irradiator irradiates the specimen with excitation light along an optical path from the irradiator to the specimen and such that the excitation light is obliquely incident at a predetermined incident angle. The first polarization converter is disposed in the optical path, and converts the excitation light into s-polarized light. The detector detects photoluminescence light generated from the specimen when the excitation light is incident on the specimen. The defect analysis detector detects a dislocation defect by analyzing a photoluminescence image obtained by photoelectrically converting the photoluminescence light.”

The patent application was filed on February 24, 2020 (Appl. No.16/798,990).

Semiconductor memory
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,861,560) developed by Kodama, Takuyo, Sagamihara Kanagawa, Japan, for a “semiconductor memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”According to one embodiment, a semiconductor memory device includes a first memory cell, a first word line coupled to the first memory cell, a first sense amplifier including a first transistor, a first bit line which couples the first memory cell to the first transistor, and a first driver configured to supply a first control signal to a gate of the first transistor. The first driver includes a first circuit configured to compare the first control signal and a second control signal to generate a third control signal based on a comparison result.”

The patent application was filed on December 17, 2019 (Appl. No.16/718,032).

Semiconductor storage
Kioxia Corporation, Minato-ku, Japan, has been assigned a patent (10,861,557) developed by Kondo, Shigeo, Yokohama, Japan, for a “semiconductor storage apparatus.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor storage apparatus includes: a memory cell array provided with memory cells, a word line connected to each gate of the memory cells, bit lines connected respectively to ends of the memory cells, and a control circuit. The control circuit controls a word line driver and a sense amplifier circuit to perform a first programming pass for programming data of states each of which has a first threshold distribution width to the memory cells and a second programming pass for programming data of the states each of which has a second threshold distribution width narrower than the first threshold distribution width to the memory cells, the second programming pass being performed after the first programming pass, and the first programming pass includes at least one first verify operation and one or more additional program operations.”

The patent application was filed on December 12, 2019 (Appl. No.16/712,178).