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SK hynix Assigned Twenty-Five Patents

Storage device and operating method, semiconductor memory, memory system and operation, storage device for determining write mode, storage device for dynamic garbage collection triggering, memory having storage device and memory controller, control device for dynamically allocating storage space and storage device including control device, storage device, computing including storage, controller, operating method and memory, controller, operating and memory for controlling buffer, mapping scheme with deterministic power transition times for flash storage, memory controller, storage device having improved cache performance, memory system and operation method of memory

Storage device and operating method
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,943,664) developed by Kwak, Woo Suk, Gyeonggi-do, Korea, for storage device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device configured to provide an improved data recovery rate includes a memory device including a plurality of memory cells and a memory controller. The memory controller includes a read operation controller for controlling the memory device to perform a read operation by applying a default read voltage or optimal read voltage to a selected word line coupled to selected memory cells among the plurality of memory cells, and an optimal read voltage operating component for determining the optimal read voltage when the read operation using the default read voltage fails, based on an average threshold voltage and cell number information which are information on a memory cell number for each of first and second distributions which are adjacent threshold voltage distributions among threshold voltage distributions that the threshold voltages of the selected memory cells form.

The patent application was filed on December 24, 2019 (16/726,712).

Storage device and operating method
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,943,639) developed by Kim, Jin Woong, and Yim, Ji Hoon, Gyeonggi-do, Korea, for storage device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device comprising: a nonvolatile memory device including a plurality of memory blocks, and a device controller configured to control the nonvolatile memory device to determine a memory block to perform a refresh operation and to control the memory block to perform the refresh operation to recover data of the memory block.

The patent application was filed on January 2, 2020 (16/733,140).

Semiconductor memory
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,943,638) developed by Hong, Yun-Gi, Gyeonggi-do, Korea, for semiconductor memory device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor memory device may include a plurality of banks, a plurality of address storage circuits respectively corresponding to the plurality of banks, and suitable for storing refresh addresses of corresponding banks, an output control circuit suitable for, based on a refresh command signal and a test mode signal, generating an output clock and selectively outputting, as output data, a refresh address outputted from any one of the address storage circuits or bank data provided from the banks, an output buffer suitable for outputting the output data to a plurality of data input/output pads based on the output clock, and a strobe signal generation circuit suitable for generating a data strobe signal based on the output clock and outputting the data strobe signal through a data strobe pad.

The patent application was filed on December 24, 2019 (16/726,724).

Memory system and operation
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,942,681) developed by Kang, Min Gu, Seoul, Korea, for memory system and operation method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory system includes a storage unit configured to include a plurality of memory blocks, a controller configured to read data from the memory block and to determine disturbance risk for the memory block, and a buffer memory unit configured to store the data read from the memory block and to provide the data to a host, wherein the controller is configured to control the buffer memory unit, in which the data read from the memory block is stored, based on the disturbance risk for the memory block.

The patent application was filed on June 2, 2020 (16/890,396).

Data storage device for determining write mode
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,942,676) developed by Jung, Hoe Seung, and Lee, Joo Young, Seoul, Korea, for data storage device for determining a write mode, operation method thereof and storage system having the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device includes a storage unit, and a controller configured to select a write mode by analyzing a tendency of commands received from a host device, and operate in the selected write mode to write data to the storage or to read data from the storage.

The patent application was filed on December 6, 2018 (16/212,114).

Storage device and method of operating
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,936,508) developed by Byun, Eu Joon, Yongin-si, Korea, for storage device and method of operating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory controller may include: a map data processor configured to receive original map data segments from a memory device and generate a mode signal, an original map data storage configured to sequentially store the original map data segments in source storage areas corresponding to source addresses, a converted map data storage configured to store the original map data segments in target storage areas corresponding to target addresses, and a map data converter configured to control the converted map data storage such that, when any one original map data segment is stored in a first target storage area corresponding to a first target address, an original map data segment subsequent to the any one original map data segment is stored in a second target storage area corresponding to a second target address obtained by adding a predetermined offset to the first target address.

The patent application was filed on September 12, 2019 (16/569,536).

Storage device for dynamic garbage collection triggering
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,936,485) developed by Lee, Dong Yong, Gyeonggi-do, Korea, for data storage device for dynamic garbage collection triggering and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device includes a controller including a flash translation layer (FTL) for controlling an operation of a nonvolatile memory device. The FTL may monitor a first read operation on the plurality of data storage regions, collect first read operation information of a first subset of data storage regions on which the first read operation is performed, the first read operation information including read counts of the first subset of data storage regions on which the first read operation is performed, and information of the first subset of data storage regions on whether soft decision has been performed on the data storage regions, change a garbage collection (GC) threshold value based on the collected first read operation information, and control the nonvolatile memory device to perform GC on the plurality of data storage regions based on the changed GC threshold value.

The patent application was filed on July 30, 2019 (16/526,543).

Memory having storage device and memory controller
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,936,421) developed by Hong, Jiman, Gyeonggi-do, Korea, for memory system having storage device and memory controller and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory system includes: a storage device including a plurality pages for storing data, and a memory controller configured to determine, when sudden power-off occurs, whether there is a high probability of a program disturb of unselected pages sharing a word line coupled to a selected page among the pages in rebooting, and output a command to perform an over-write operation for programming data in the selected page or skip the over-write operation, based on a result of the determination.

The patent application was filed on January 2, 2019 (16/238,083).

Control device for dynamically allocating storage space and data storage including control
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,929,028) developed by Kim, Bryan Suk Joon, and Min, Sang Lyul, Seoul, Korea, for control device for dynamically allocating storage space and data storage device including the control device.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A control device for controlling a memory device to process requests from a plurality of hosts may include a request controller configured to manage a set representing storage space allocated to each of the plurality of the hosts, and a set controller configured to monitor requests from the plurality of hosts and to adjust size of the set, wherein, when the request is a write request from a host among the plurality of hosts, the request controller selects a target physical address among physical addresses included in the set allocated to the host, the target physical address indicating where the request is to be processed.

The patent application was filed on February 25, 2019 (16/284,924).

Storage device, computing including storage
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,922,223) developed by Kim, Byung Jun, Seoul, Korea, and Byun, Eu Joon, Gyeonggi-do, Korea, for storage device, computing system including storage device, and method of operating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory controller may control a memory device for storing logical to physical (L2P) mapping information, the memory controller comprising: a map data storage configured to store a plurality of L2P address segments included in the L2P mapping information, and a map data manager configured to: provide at least one L2P address segment of the plurality of L2P address segments to the host in response to a map data request of the host, and remove a L2P address segment from the map data storage, wherein the L2P address segment is selected, among the plurality of L2P address segments, based on a least recently used (LRU) frequency and whether the L2P address segment is provided to the host.

The patent application was filed on October 10, 2019 (16/598,724).

Storage device
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,922,167) developed by Her, Min Ho, Chungcheongbuk-do, Korea, Kim, Dong Hyun, Gyeonggi-do, Korea, Kim, Seung Il, and Jung, Youn Ho, Chungcheongbuk-do, Korea, for storage device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory controller for controlling a memory device including a register for storing a plurality of parameters includes: a register information storage configured to store the plurality of parameters as a plurality of setting parameters, a register controller configured to provide the memory device with a parameter change command for requesting a selected parameter to be changed to a set value, and acquire, from the memory device, Cyclic Redundancy Check (CRC) calculation information on the plurality of parameters including the selected parameter, a CRC reference information generator configured to generate CRC reference information on the plurality of setting parameters including at least one setting parameter changed to the set value, and a CRC information comparator configured to determine whether an error is included in the plurality of parameters according to a comparison result between the CRC calculation information and the CRC reference information.

The patent application was filed on June 13, 2019 (16/440,536).

Controller, operating method and memory
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,922,000) developed by Kim, Do Hyun, Gyeonggi-do, Korea, for controller, operating method thereof, and memory system including the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A controller, an operating method thereof and a memory system including the same are disclosed. The operating method of a controller which controls a memory system including a nonvolatile memory device including a plurality of data storage regions, includes receiving a command from a host, determining whether a pre-condition command is included in the command by confirming whether the received command has a reserved area, and switching the memory system to a pre-condition state by performing a secure erase and patterning on the nonvolatile memory device according to the pre-condition command included in the command.

The patent application was filed on January 17, 2020 (16/745,837).

Data storage device
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,916,301) developed by Jeon, Myeong Woon, Gyeonggi-do, Korea, for data storage device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method for operating a data storage device includes determining appropriateness of a first read bias for adjacent target threshold voltage distributions among threshold voltage distributions for a plurality of memory cells, and if it is determined that the first read bias is inappropriate, determining a second read bias.

The patent application was filed on September 26, 2019 (16/584,344).

Memory device and operating
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,916,277) developed by Lim, Sang Oh, Chungcheongbuk-do, Korea, for memory device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory device includes a memory cell array including a plurality of memory blocks and a storage block storing a plurality of pieces of option parameter information, a parameter determining circuit outputting a parameter information signal by measuring a skew of the memory device, a peripheral circuit performing a read operation on the storage block, and a control logic controlling the peripheral circuit to perform the read operation on a selected piece of option parameter information, among the plurality of pieces of option parameter information, in response to the parameter information signal, and setting an option parameter according to the selected piece of option parameter information.

The patent application was filed on August 23, 2019 (16/549,388).

Storage device
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,915,473) developed by Jang, Chae Kyu, Gyeonggi-do, Korea, for a data storage device.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device may include: first and second memory devices suitable for sharing an input clock signal line and at least one I/O signal line, and a controller suitable for enabling the first and second memory devices at the same time, and controlling the first and second memory devices by transmitting an input clock signal to the input clock signal line and transmitting an input signal synchronized with the input clock signal to the I/O signal line.

The patent application was filed on November 14, 2017 (15/812,110).

Controller, operating and memory for controlling buffer
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,915,265) developed by Park, Jeen, and Kim, Jang-Hyun, Gyeonggi-do, Korea, for controller, operating method thereof and memory system for controlling a buffer.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A controller includes a core transferring a plurality of requests, a buffer including a plurality of clusters, a buffer manager assigning the plurality of requests respectively into the plurality of clusters, and storing storage information of the buffer and cluster information regarding each of the plurality of clusters, into which the assigned requests are respectively assigned, and a descriptor updating a descriptor report such that the cluster information regarding each of the plurality of clusters and the assigned requests correspond to each other, respectively. The buffer manager is capable of assigning automatically a request provided from a host into the buffer without a control of the core.

The patent application was filed on August 9, 2018 (16/059,220).

Mapping scheme with deterministic power transition times for flash storage
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,915,256) developed by Mylavarapu, Sai Krishna, Santa Clara, CA, for an efficient mapping scheme with deterministic power transition times for flash storage devices.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory system may include a memory device and a controller. The memory device may include a plurality of storage areas. The controller may be suitable for processing data associated with at least one storage area among the plurality of storage areas of the memory device, and includes a logical to physical (L2P) table suitable for storing logical to physical (L2P) data, and a journal for storing update information indicating a change of logical to physical (L2P) information stored in the L2P table. The memory device may include a logical to physical (L2P) area corresponding to the L2P table of the controller such that, in the event of a power loss, the journal is written to the L2P area of the memory device and restored to the controller when power is restored.

The patent application was filed on February 25, 2016 (15/053,322).

Semiconductor device and manufacturing
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,910,400) developed by Park, Min Woo, and Cho, Kyo Yeon, Seoul, Korea, for semiconductor device and method of manufacturing the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Provided herein may be a semiconductor device and a method of manufacturing the same. The method of manufacturing the semiconductor device may include forming a tunnel insulating layer in a channel hole passing through a preliminary stack structure in which interlayer insulating layers and material layers are alternately stacked. The method may include forming recess areas by removing the material layers exposed through a slit passing through the preliminary stack structure. The method may include forming a data storage layer in the recess areas through the slit. The thickness of the data storage layer may be formed regardless of a size of the channel hole.

The patent application was filed on July 3, 2019 (16/503,216).

Memory controller
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,910,074) developed by Park, Se Chang, Cheongju-si, Korea, for memory controller and method of operating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Circuit designs and operating techniques for a storage device that includes, in one implementation, a memory controller configured to control a memory device including a plurality of memory blocks, each including a plurality of memory cells. The memory controller may include a memory device interface configured to perform data communication with the memory device, and a soft program controller communicatively coupled to the memory device interface and configured to count a number of iterations that an erase operation on an erase target memory block, among the plurality of memory blocks, has been suspended until the erase operation is completed, and to perform a soft program operation on the erase target memory block after the erase operation has been completed, based on the number of iterations that the erase operation on the erase target memory block has been suspended.

The patent application was filed on May 30, 2019 (16/426,418).

Storage device and operating
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,910,070) developed by Her, Min Ho, Chungcheongbuk-do, Korea, Kim, Dong Hyun, Gyeonggi-do, Korea, Kim, Seung Il, Kim, Yong Ho, Lee, Jae Min, Choi, Seon Young, Chungcheongbuk-do, Korea, for storage device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present disclosure relates to an electronic device. A storage device includes a memory device configured to include a plurality of memory cells and a memory controller configured to determine a read voltage for a read operation to be performed on the memory device according to whether the read operation is a cache read operation.

The patent application was filed on January 2, 2019 (16/238,256).

Storage device and operating
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,910,047) developed by Lee, Un Sang, Chungcheongbuk-do, Korea, and An, Chi Wook, Gyeonggi-do, Korea, for storage device and method of operating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes a memory device configured to perform a read operation on a selected word line among a plurality of word lines, and a memory controller configured to control the memory device to: perform the read operation, perform a read retry operation on the selected word line, by changing a read voltage level, when the read operation fails, and perform an additional read retry operation on the selected word line, by changing the read voltage level and an application time of voltages related to the read operation, depending on whether the selected word line is a set word line, when the read retry operation fails.

The patent application was filed on June 13, 2019 (16/440,174).

Storage device having improved cache performance
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,910,045) developed by Lee, Joo Young, and Jung, Hoe Seung, Seoul, Korea, for storage device having improved cache performance and method of operating the same.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes a memory device including a memory cell array and a page buffer group coupled to the memory cell array, and a memory controller configured to store a plurality of cache data chunks to be sequentially programmed, and configured to input a next cache data chunk corresponding to a next program sequence to the page buffer group, when programming of Least Significant Bit (LSB) data of a cache data chunk among the plurality of cache data chunks is completed.

The patent application was filed on June 17, 2019 (16/443,367).

Memory system and operation method of memory
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,902,902) developed by Son, Mun-Gyu, Gyeonggi-do, Korea, for memory system and operation method of memory system.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory system may include a memory system may include a memory device including a table suitable for managing rows for an additional refresh operation, and a memory controller comprising: a replica table corresponding to the table of the memory, an error history storage circuit suitable for storing an error history of the memory device, and a determination circuit suitable for determining whether to perform an active operation of a target row to be evicted from the replica table without the additional refresh operation, using the error history, when the target row is present.

The patent application was filed on October 30, 2019 (16/669,212).

Controller and operating method
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,895,998) developed by Hwang, Mi Hyun, Seoul, Korea, and Lee, Jong Chern, Chungcheongbuk-do, Korea, for controller and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device for outputting a pattern for analyzing input data includes: a data receiver configured to sequentially receive a plurality of input data, each including a pattern for identifying data for a corresponding input period of a plurality of input periods, a pattern determiner configured to set, as a reference pattern, a pattern included in any one data among the plurality of input data, and generate a control signal based on whether correspondence data including the same pattern as the reference pattern is input, and a data storage configured to store the plurality of input data in a sequence in which the plurality of input data are input, and, when the correspondence data is stored, output capture data that are stored data including the correspondence data based on the control signal.

The patent application was filed on April 23, 2019 (16/391,535).

Storage device and operating method
SK hynix Inc., Gyeonggi-do, Korea, has been assigned a patent (10,891,236) developed by Park, Byeong Gyu, Gyeonggi-do, Korea, for data storage device and operating method thereof.

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method for operating a data storage device which uses a nonvolatile memory device including a buffer memory block which temporarily stores data, as a storage medium, includes receiving an unmap request which requests that an unmap address be erased, from a host device, storing the unmap address and flag information indicating that the unmap address is unmapped, in a first empty page of the buffer memory block, and mapping the unmap address and flagging flag information indicating that the unmap address is unmapped, in a physical-to-logical (P2L) map corresponding to the first empty page of the buffer memory block.

The patent application was filed on September 13, 2017 (15/703,090).

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