Marvell Asia Assigned Two Patents

Error correction for storage
Marvell Asia Pte., Ltd., Singapore, Singapore , has been assigned a patent (10,930,315) developed by Burd, Gregory, San Jose, CA, Varnica, Nedeljko, and Tang, Heng, Sunnyvale, CA, for an “error correction for storage devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method for performing error recovery for data stored on a track of a storage device, in which the method includes: receiving a request to read the data from the storage device, identifying a plurality of sectors of the track to be read in response to the request, reading the data from the plurality of sectors of the track and parity data, based on the data read from the plurality of sectors, determining whether any of the plurality of sectors corresponds to a failed sector, and recovering a portion of the data from the failed sector using the parity data and portions of the data stored in remaining ones of the plurality of sectors.”

The patent application was filed on January 21, 2019 (16/253,027).

Temperature-based memory management
Marvell Asia Pte., Ltd., Singapore, Singapore , has been assigned a patent (10,928,870) developed by Chang, Runzi, Saratoga, CA, for “apparatus and methods for temperature-based memory management.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present disclosure describes apparatuses and methods for temperature-based memory management. In some aspects, a temperature-based memory manager receives, from a temperature sensor of a memory block, an indication of a temperature of the memory block. The temperature-based memory manager compares the indication of the temperature with a temperature threshold associated with the memory block. Based on a result of the comparison, the temperature-based memory manager alters a frequency of a clock signal by which the memory block operates effective to change power consumption of the memory block. By so doing, power consumption of the memory block may be reduced, and operating temperatures of the memory block can be kept below temperatures that are likely to affect reliability of storage cells of the memory block. This can be effective to improve reliability and long-term performance of the memory block, particularly in high-performance or mission critical applications.”

The patent application was filed on January 25, 2019 (16/257,860).