Zeno Semiconductor Assigned Two Patents

Semiconductor memory having both volatile and non-volatile functionality
Zeno Semiconductor, Inc., Sunnyvale, CA, has been assigned a patent (10,867,676) developed by Widjaja, Yuniarto, Cupertino, CA, for a “semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell. The cell further includes a nonvolatile memory comprising a resistance change element configured to store data stored in the floating body under any one of a plurality of predetermined conditions. A method of operating semiconductor memory to function as volatile memory, while having the ability to retain stored data when power is discontinued to the semiconductor memory is described.”

The patent application was filed on May 9, 2019 (16/407,614).

Semiconductor memory having volatile and multi-bit non-volatile functionality
Zeno Semiconductor, Inc., Sunnyvale, CA, has been assigned a patent (10,818,354) developed by Widjaja, Yuniarto, Cupertino, CA , for a “semiconductor memory having volatile and multi-bit non-volatile functionality and method of operating.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor memory cell, semiconductor memory devices comprising a plurality of the semiconductor memory cells, and methods of using the semiconductor memory cell and devices are described. A semiconductor memory cell includes a substrate having a first conductivity type, a first region embedded in the substrate at a first location of the substrate and having a second conductivity type, a second region embedded in the substrate at a second location of the substrate and have the second conductivity type, such that at least a portion of the substrate having the first conductivity type is located between the first and second locations and functions as a floating body to store data in volatile memory, a trapping layer positioned in between the first and second locations and above a surface of the substrate, the trapping layer comprising first and second storage locations being configured to store data as nonvolatile memory independently of one another, and a control gate positioned above the trapping layer.”

The patent application was filed on January 3, 2019 (16/239,456).