BitMicro Assigned Patent

BitMicro LLC, Reston, VA, has been assigned a patent (10,877,907) developed by Bruce, Ricardo H., Fremont, CA, Villapana, Elsbeth Lauren Tagayo, Cambridge, Great Britain, and Baylon, Joel Alonzo, Cavite, Philippines, for a “multilevel memory bus system.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present invention relates to a multilevel memory bus system for transferring information between at least one DMA controller and at least one solid-state semiconductor memory device, such as NAND flash memory devices or the like. This multilevel memory bus system includes at least one DMA controller coupled to an intermediate bus, a flash memory bus, and a flash buffer circuit between the intermediate bus and the flash memory bus. This multilevel memory bus system may be disposed to support: an n-bit wide bus width, such as nibble-wide or byte-wide bus widths, a selectable data sampling rate, such as a single or double sampling rate, on the intermediate bus, a configurable bus data rate, such as a single, double, quad, or octal data sampling rate, CRC protection, an exclusive busy mechanism, dedicated busy lines, or any combination of these.”

The patent application was filed on November 20, 2018 (16/197,001).