R&D: High-Efficiency Threshold Voltage Distribution Test Method Based on Reliability of 3D NAND Flash Memory

Microelectronics Reliability has published an article written by Debao Wei, Xiaoyu Chen, Hua Feng, Liyan Qiao, and Xiyuan Peng, Harbin Institute of Technology, #3033, No.2, Yikuang Street, Harbin, Heilongjiang 150080, China.

Abstract: “With the improvement of manufacturing technology and the use of multi-level technology, the amount of charge stored in a flash memory cell decreases, the number of bits stored in each cell increases, the threshold voltage window becomes smaller. Therefore, it is more vulnerable to external interference to cause the overlap of threshold voltages between adjacent states, which makes it difficult to determine the logical value of cell, resulting in the decline of NAND flash memory reliability. In this paper, we propose an efficient threshold voltage detection method based on READ-OFFSER operation. And using this method to investigate the programming interference of 3D TLC flash memory from the perspective of threshold voltage, it is found that the programming interference between adjacent layers is the most serious.“