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Cadence Design Systems Assigned Patent

Caching error checking data for memory having inline storage configurations

Cadence Design Systems, Inc., San Jose, CA, has been assigned a patent (10,769,013) developed by MacLaren, John M., Laws, Landon, Olson, Carl Nels, Austin, TX, and Shepherd, Thomas J., Cedar Park, TX, for a "caching error checking data for memory hav...

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