R&D: Kaist Researchers Unveils Advanced NVMe Controller Technology for Next Gen Memory Devices

Kaist researchers advanced NVMe controller technology for next gen information storage devices, and made this technology named ‘OpenExpress’ freely available to all universities and research institutes around the world to help reduce the research cost in related fields.

Prototype board and floorplan of OpenExpress
(Credit: Professor Myoungsoo Jung, Kaist)

NVMe is a communication protocol made for high-performance storage devices based on PCIe interface. it has been developed to take the place of the SATA protocol, which was developed to process data on HDDs and did not perform well in SSDs.

Unlike HDDs that use magnetic spinning disks, SSDs use semiconductor memory, allowing the rapid reading and writing of data. SSDs also generate less heat and noise, and are more compact and lightweight.

Since data processing in SSDs using NVMe is up to 6x faster than when SATA is used, NVMe has become the standard protocol for high speed and volume data processing, and is currently used in many flash-based information storage devices.

Studies on NVMe continue at both the academic and industrial levels, however, its poor accessibility is a drawback. Major information and communications technology companies around the world expend astronomical costs to procure IP related to hardware NVMe controllers, necessary for the use of NVMe. However, such IP is not publicly disclosed, making it difficult to be used by universities and research institutes for research purposes.

Although a small number of US Silicon Valley start-ups provide parts of their independently developed IP for research, the cost of usage is around $34,000/month. The costs skyrocket even further because each copy of single-use source code purchased for IP modification costs approximately $84,000.

In order to address these issues, a group of researchers led by Professor Myoungsoo Jung from the School of Electrical Engineering at KAIST developed a next gen NVMe controller technology that achieved parallel data I/O processing for SSDs in a hardware automated form.

The researchers presented their work at the 2020 USENIX Annual Technical Conference (USENIX ATC ’20) in July, and released it as an open research framework named OpenExpress.

This NVMe controller technology developed by Jung’s team comprises a range of basic hardware IP and key NVMe IP cores. To examine its actual performance, the team made an NVMe hardware controller prototype using OpenExpress, and designed all logics provided by OpenExpress to operate at high frequency.

The field-programmable gate array (FPGA) memory card prototype developed using OpenExpress demonstrated increased I/O data processing capacity per second, supporting up to 7GB/s bandwidth. This makes it suitable for ultra-high speed and volume next gen memory device research.

In a test comparing various storage server loads on devices, the team’s FPGA also showed 76% higher bandwidth and 68% lower input/output delay compared to Intel’s new high performance SSD (Optane SSD), which is sufficient for many researchers studying systems employing future memory devices. Depending on user needs, silicon devices can be synthesized as well, which is expected to further enhance performance.

The NVMe controller technology  can be freely used and modified under the OpenExpress open-source end-user agreement for non-commercial use by all universities and research institutes. This makes it useful for research on next-gen memory compatible NVMe controllers and software stacks.

“With the product of this study being disclosed to the world, universities and research institutes can now use controllers that used to be exclusive for only the world’s biggest companies, at no cost,” said Jung. He went on to stress, “This is a meaningful first step in research of information storage device systems such as high-speed and volume next gen memory.”

This work was supported by a grant from MemRay, a company specializing in next gen memory development and distribution.

Details about the study