nCorium Assigned Patent
Multi-level data cache and storage on memory bus
By Francis Pelletier | September 8, 2020 at 2:10 pmnCorium, Los Altos, CA, has been assigned a patent (10,747,694) developed by Lalam, Arvindhkumar, Carlsbad, CA, for “multi-level data cache and storage on a memory bus.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: ”This invention provides a system having a processor assembly interconnected to a memory bus and a memory-storage combine, interconnected to the memory bus. The memory-storage combine is adapted to allow access, through the memory bus, a combination of random access memory (RAM) based data storage and non-volatile mass data storage. A controller is arranged to address the both RAM-based data storage and the non-volatile mass data storage as part of a unified address space in the manner of RAM.”
The patent application was filed on June 6, 2017 (15/615,800).