R&D: Resistance Drift in Ge2Sb2Te5 Phase Change Memory Line Cells at Low Temperatures and Response to Photoexcitation

Applied Physics Letters has published an article written by R. S. Khan, Department of Electrical and Computer Engineering, University of Connecticut, Storrs, Connecticut 06269, USA, F. Dirisaglik, Department of Electrical and Electronics Engineering, Eskisehir Osmangazi University, Eskisehir 26480, Turkey, A. Gokirmak, and H. Silva, Department of Electrical and Computer Engineering, University of Connecticut, Storrs, Connecticut 06269, USA.

Abstract: “Resistance drift in amorphous Ge₂Sb₂Te₅ is experimentally characterized in melt-quenched line cells in the range of 300 K to 125 K and is observed to follow the previously reported power-law behavior with drift coefficients in the range of 0.07 to 0.11 in the dark, linearly decreasing with 1/kT. While these drift coefficients measured in the dark are similar to commonly observed drift coefficients (∼0.1) at and above room temperature, measurements under light show a significantly lower drift coefficient (0.05 under illumination vs 0.09 in the dark at 150 K). Periodic on/off switching of light shows a sudden decrease/increase in resistance, attributed to photo-excited carriers, followed by a very slow response (∼30 min at150 K) attributed to contribution of electron traps and slow trap-to-trap charge exchanges. A device-level electronic model is used to relate these experimental findings to gradual charging of electron traps in amorphous Ge₂Sb₂Te₅, which gives rise to growth of a potential barrier for holes in time and, hence, resistance drift.“

“Phase change memory (PCM) is a state-of-the-art non-volatile memory technology that has recently entered the consumer market, filling the gap between DRAM and NAND flash in the memory hierarchy, offering higher speed and endurance compared to NOR and NAND flash memory.PCM utilizes the large contrast in conductivity between the crystalline (low-resistance) and amorphous (high-resistance) phases of chalcogenide materials such as Ge₂Sb₂Te₅(GST) to store information.PCM devices can be switched between these two phases using short electrical pulseswith endurance levels exceeding 10¹² cycles.The implementation of multi-bit-per-cell PCM is limited as resistance levels overlap with time due to the drift of the resistance of the amorphous phase with time, following a power law.Resistance drift has been reported to be a function of annealing and readout temperature,programmed resistance level, and read current. There have been several theories explaining the origin of drift; however, the mechanisms giving rise to drift still need to be fully understood.“