R&D: Approach of 3D NAND Flash Based Nonvolatile Computing-In-Memory Accelerator for Deep Neural Networks With Calibration and Read Disturb Analysis
Simulation results indicate optimized 3D NAND device is able to sustain sufficient inference accuracy over 10G read stress which may support up to 10-year usage for applications on edge DNN computing.
This is a Press Release edited by StorageNewsletter.com on June 23, 2020 at 2:29 pmIEEE Xplore has published, in 2020 IEEE International Memory Workshop (IMW) proceedings, an article written by Po-Kai Hsu, Pei-Ying Du, Chieh Roger Lo, Hang-Ting Lue, Wei-Chen Chen, Tzu-Hsuan Hsu, Teng-Hao Yeh, Chih-Chang Hsieh, Ming-Liang Wei, Keh-Chung Wang, and Chih-Yuan Lu, Macronix International Co., Ltd., Hsinchu, Taiwan.
Abstract: “Deep neural networks (DNNs) are very popular these years owing to their powerful capability in many artificial intelligence (AI) applications of classification and recognition. The computing-in-memory (CIM) is an emerging method that utilizes memory arrays directly as the computing units to accelerate the DNN calculation. Different from the conventional Von Neumann architecture, CIM can drastically reduce data movements and power consumption. An optimal method was proposed to transform 3D NAND Flash into a high-bandwidth, high-density and low-power nonvolatile CIM (nvCIM) [1]. In this paper, we further analyze the read disturb of 3D NAND Flash nvCIM based on a previous study [2]. The simulation results indicate that the optimized 3D NAND device is able to sustain sufficient inference accuracy over 10G read stress which may support up to 10-year usage for applications on edge DNN computing.“
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