Samsung Electronics Assigned Sixteen Patents

SSD architecture for FPGA based acceleration
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,585,843) developed by Kachare, Ramdas P., Pleasanton, CA, Worley, Fred, Rogers, Harry, San Jose, CA, Wu, Wentao, Milpitas, CA, and Subramaniyan, Nagarajan, San Jose, CA, for a “SSD architecture for FPGA based acceleration.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A system is disclosed. The system may include a processor running an application program and a memory storing data being used by the application program. An upstream port enables communication with the processor, a downstream port enables communication with a storage device. The system may also include an acceleration module implemented using hardware and including an Acceleration Platform Manager, (APM-F) to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a physical function, (PF) to expose the storage device, a second function to expose the acceleration module, a controller to manage operations of the storage device, storage for application data for the application program, and a storage device Acceleration Platform Manager, (APM-S) to assist the APM-F in executing the acceleration instruction. A downstream filter associated with the downstream port may intercept an acceleration instruction associated with a downstream Filter Address Range, (FAR) received from the storage device and deliver the acceleration instruction to the APM-F, the acceleration instruction being. An upstream filter associated with the upstream port may intercept an acceleration instruction received from the processor and deliver the second acceleration instruction to the APM-F. The processor, the acceleration module, and the storage device may communicate via a Peripheral Component Interconnect Exchange, (PCIe) bus. The acceleration module may support performing the acceleration instruction on the application data on the storage device for the application program without loading the application data into the memory.”

The patent application was filed on September 6, 2018 (16/124,179).

Operation method of host system including storage device and operation method of storage device controller
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,585,822) developed by Lee, Chul-Woo, Suwon-si, Korea, and Cho, Wonhee, Seoul, Korea, for “operation method of host system including storage device and operation method of storage device controller.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method of operating a storage device controller which controls a storage device includes receiving a debugging data request command through a peripheral component interconnect express, (PCIe) interface of the storage device controller from outside of the storage device controller, and storing debugging data in a register included in the PCIe interface.”

The patent application was filed on July 13, 2018 (16/034,887).

SSD architecture for FPGA based acceleration
Samsung Electronics Co., Ltd. Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,585,819) developed by Kachare, Ramdas P., Pleasanton, CA, Worley, Fred, Rogers, Harry, San Jose, CA, Wu, Wentao, Milpitas, CA, and Subramaniyan, Nagarajan, San Jose, CA, for a “SSD architecture for FPGA based acceleration.“

The patent application was filed on September 5, 2018 (16/122,865).

Distributed erasure coding
Samsung Electronics Co., Ltd. Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,585,749) developed by Kachare, Ramdas P., Cupertino, CA, Worley, Fred, San Jose, CA, Fischer, Stephen, Mountain View, CA, and Pinto, Oscar, San Jose, CA, for “system and method for distributed erasure coding.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A system and method for distributed erasure coding. A plurality of storage devices is directly connected to one or more host computers, without an intervening central controller distributing data to the storage devices and providing data protection. Parity codes are stored in one or more dedicated storage devices or distributed over a plurality of the storage devices. When a storage device receives a write command, it calculates a partial parity code, and, if the parity code for the data being written is on another storage device, sends the partial parity code to the other storage device, which updates the parity code using the partial parity code.”

The patent application was filed on October 20, 2017 (15/789,884).

Data storage and data processing
Samsung Electronics Co., Ltd. Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,579,279) developed by Kang, Nam Wook, Hwaseong-si, Korea, for “data storage device and data processing system having the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device includes a first multi-chip set which includes a first volatile memory, a first non-volatile memory, and a first core configured to control the first volatile memory and the first non-volatile memory, a second multi-chip set which includes a second volatile memory, a second non-volatile memory, and a second core configured to control the second volatile memory and the second non-volatile memory. A controller is connected to the first multi-chip set and the second multi-chip set and configured to swap a first logical address of a first storage region of the first non-volatile memory with a second logical address of a second storage region of the second non-volatile memory.”

The patent application was filed on April 18, 2018 (15/956,345).

High-density storage
Samsung Electronics Co., Ltd. Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,573,390) developed by Berman, Amit, Ramat Gan, Israel, for a “high-density storage system.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A high-density storage system includes a memory device, and a controller including a range allocation and program order block configured to determine a range of a threshold voltage for each level of each memory cell of the memory device, based on initial data and an interference in the memory device, and determine an order in which groups of memory cells of the memory device are programmed, based on the interference. The controller further includes a statistical cell correction block configured to perform statistical cell correction on the range of the threshold voltage for each level of each memory cell, based on the order in which the groups of the memory cells are programmed and reference information of each level of each memory cell of the memory device that is received from the memory device.”

The patent application was filed on November 30, 2018 (16/206,357).

Storage device having parameter calibration function
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,573,389) developed by Kim, Chan-Ha, Kang, Suk-Eun, Hwaseong-si, Korea, Kim, Ji-Su, Seoul, Korea, Ro, Seung-Kyung, Anyang-si, Korea, Lee, Dong-Gi, Yongin-si, Korea, Lee, Yun-Jung, Suwon-si, Korea, Lee, Jin-Wook, Lee, Hee-Won, Seoul, Korea, Jang, Joon-Suc, and Choi, Young-Ha, Hwaseong-si, Korea, for “storage device having parameter calibration function, and operating method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”An operating method of a storage device includes a controller: receiving read data from a non-volatile memory, measuring a plurality of threshold voltage distributions respectively corresponding to a plurality of memory units of the non-volatile memory, based on the received read data, measuring a distribution variation between the plurality of memory units, based on the measured plurality of threshold voltage distributions, dynamically determining operation parameters for the non-volatile memory, based on the measured distribution variation, and transmitting, to the non-volatile memory, an operate command, an address, and at least one operation parameter corresponding to the address.”

The patent application was filed on June 21, 2018 (16/013,988).

Storage device communicating with host
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,572,402) developed by Satish, Kumar, Suwon-si, Korea, Lee, Jupyung, Incheon, Korea, Doh, In Hwan, Seoul, Korea, and Hwang, JooYoung, Suwon-si, Korea, for “storage device communicating with host according to multicast communication protocol and communication method of host.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes a memory device, and a controller configured to fetch a command from a host, the command indicating a logical address, process the command based on the logical address, and receive, from a first replica storage device, an acknowledgment signal indicating that the command has been processed by the first replica storage device.”

The patent application was filed on April 27, 2018 (15/964,737).

Operating data storage device
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,572,382) developed by Yun, Hyun-Sik, Hwaseong-si, Korea, Park, Youn Won, and Oh, Sang Yoon, Suwon-si, Korea, for “method of operating data storage device and method of operating data processing system including the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method of operating a data storage device includes receiving size information of a region needed for a data transaction from a host, calculating the sum of a size of a first region available in an invisible region-to-user and a size of a second region available in a visible region-to-user based on the size information, and communicating a response indicating possibility of the data transaction to the host based on a calculation result.”

The patent application was filed on May 26, 2015 (14/721,480).

Configure and access scalable object stores using KV-SSDs and hybrid backend storage tiers of KV-SSDs, NVMe-SSDs and other flash devices
Samsung Electronics Co., Ltd. Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,572,161) developed by Subramanian, Anand, and Pinto, Oscar Prem, San Jose, CA, for “methods to configure and access scalable object stores using KV-SSDs and hybrid backend storage tiers of KV-SSDs, NVMe-SSDs and other flash devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A system is disclosed. The system may include a computer system, which may include a processor that may execute instructions of an application that accesses an object using an object command, and a memory storing the instructions of the application. The computer system may also include a conversion module to convert the object command to a key-value, (KV) command. Finally, the system may include a storage device storing data for the object and processing the object using the KV command.”

The patent application was filed on January 26, 2018 (15/881,706).

Operating storage device to recover performance degradation due to retention characteristic
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,572,158) developed by Lee, Sang Yong, Hwaseong-si, Korea, Gahng, Shin Wook, Suwon-si, Korea, and Lee, Chul, Hwaseong-si, Korea, for “method of operating storage device to recover performance degradation due to retention characteristic and method of operating data processing system including the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device may include a plurality of memory cells arranged in pages and blocks, each page including a row of memory cells, and each block including a plurality of pages of memory cells. The storage device may include a memory device, such as a nonvolatile memory device, which includes these items. A data recovery method for the storage device may include receiving by the storage device a first command corresponding to a first selected data recovery scheme. Based on the first command: a first target page scheme for performing error detection on the plurality of blocks is applied, target pages are read using the first target page scheme, and an amount of errors in each read target page is detected. In addition, it may be determined that a target page of a first block has at least a first threshold amount of errors, and based on the determination, data recovery for the first block may be performed by relocating all data stored in the first block to another block. Further, it may be determined that no read page in a second block has at least the first threshold amount of errors, and as a result, the data stored in the second block can be maintained.”

The patent application was filed on October 12, 2016 (15/291,094).

Smart card device
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,565,405) developed by Cho, Hyuck-Jun, Hwaseong-si, Korea, Na, Donald, Hwasung, Korea, Baek, Seung-Hwan, Anyang-si, Korea, Oh, Jae-Keun, Seoul, Korea, and Chun, Kee-Moon, Seongnam-si, Korea, for “smart card device, system including the same and method of operating smart card system.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed.”

The patent application was filed on February 14, 2017 (15/432,601).

Controller and storage device
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,564,876) developed by Woo, Seonghoon, Hwaseong-si, Korea, and Hwang, Soon Suk, Ansan-si, Korea, for “controller and storage device including controller and nonvolatile memory devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes nonvolatile memory devices arranged in groups, and a controller connected with the groups respectively through channels. The controller is configured to generate an access request for a nonvolatile memory device among the nonvolatile memory devices, and transmit, based on the access request, access requests respectively to two or more groups, among the groups, respectively through two or more channels, among the channels.”

The patent application was filed on November 6, 2017 (15/804,226).

Storage device including multi data rate memory and memory controller
Samsung Electronics Co., Ltd. Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,559,336) developed by Kim, Hyeon-Wu, Gyeongsangbuk-do, Korea, Ahn, Seok-Won, Suwon-si, Korea, and Yoon, Chan-Ho, Seoul, Korea, for a “storage device including multi data rate memory device and memory controller.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory controller is used to control a first storage block having a first data rate and a second storage block having a second data rate. The memory controller includes, a memory interface that transceives a data signal and a data strobe signal with the first and second storage blocks, and a sub controller that stores access information about the first data rate and the second data rate. The sub controller may include a delay lookup table storing access information including first strobe adjustment timing information defining a first data strobe signal provided to the first storage block, and second strobe adjustment timing information defining a second data strobe signal provided to the second storage block.”

The patent application was filed on September 24, 2018 (16/140,066).

Storage device
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,552,362) developed by Hong, Boram, Suwon-si, Korea, Kang, Sung-Sun, Hwaseong-si, Korea, Kwon, Otae, Seoul, Korea, and Kim, Min-Woo, Yongin-si, Korea, for “storage device and operating method thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage device includes at least one nonvolatile memory device configured to store self-diagnosis firmware and a storage controller configured to communicate with an external device through a sideband interface. The storage controller is configured to perform self-diagnosis of the storage device using the self-diagnosis firmware according to the control of the external device. The storage controller is configured to transmit a result of the self-diagnosis to the external device through the sideband interface.”

The patent application was filed on February 24, 2016 (15/052,175).

Morphable ECC encoder/decoder for NVDIMM over DDR channel
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, Korea, has been assigned a patent (10,552,256) developed by Niu, Dimin, Sunnyvale, CA, Chang, Mu-Tien, San Jose, CA, and Zheng, Hongzhong, Los Gatos, CA, for a “morphable ECC encoder/decoder for NVDIMM over DDR channel.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A hardware coding mechanism is described. The coding mechanism may include a first encoder to produce a first code using a base number of bits and a second encoder to produce a second code using a supplementary number of bits. The second code and the first code together may be stronger than the first code alone. A mode register stored in a storage may specify whether a switch to the second encoder is open or closed: the first coder is always used.”

The patent application was filed on August 11, 2017 (15/675,679).