Apacer Pinpoints Accuracy With 3D NAND Flash Optimization

NAND flash has become a mature technology, and the varieties of formats that are now available are already adopted in many industrial applications.

However, with the desire to go beyond the standard options, Apacer Technology, Inc. has developed certain optimizations of NAND flash technology. The goal of these optimizations is to provide customers with the amount of P/E cycles that best suits their application.

Previously, the company developed one form of NAND flash optimization known as SLC-lite. The central concept behind SLC-lite is to make 2D MLC behave like SLC. MLC contains 2 bits, but by programming only one of the 2 bits, the least significant bit (LSB), the cell distribution behaves almost identically to that of SLC flash. The endurance is then greatly increased, reaching 20,000 P/E cycles. Standard 2D MLC can only reach 3,000 P/E cycles.

However, with the maturity of 3D NAND flash technology, the firm’s engineers developed a similar process to SLC-lite for 3D NAND drives. The two new forms of this technology are called SLC-liteX and MLC-liteX. SLC-liteX is based on 3D NAND. The firmware is tweaked by the company’s engineering team so as to offer the greatest number of P/E cycles in this format – 30,000, which is ten times more than MLC or industrial 3D TLC. The longest lifespans are available at reasonable cost.

MLC-liteX is also based on 3D NAND technology. The firmware is fine-tuned in such a way as to offer more than three times as many P/E cycles (10,000) than MLC or industrial 3D TLC. Cost-benefit optimization is achieved while lifespans are still extended.

The standard bit format for 3D NAND TLC stores 3 bits in 1 cell. MLC-liteX programs only 2 of the 3 bits. So the capacity of MLC-liteX is only reduced by a third. The advantage of this tradeoff is that P/E cycles are increased. Continuing in this vein, SLC-liteX programs only 1 of the 3 bits. The capacity is therefore reduced by two-thirds, but even more P/E cycles are available.