R&D: Self-Assembled Sn Nanocrystals as Floating Gate of Non-Volatile Flash Memory

ACS Applied Electronics Materials (American Chemical Society) has published an article written by Jaswant Rathore, Department of Physics, Indian Institute of Technology Bombay, Mumbai 400076, India, Rajveer S Fandan, Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai 400076, India, and Escuela Técnica Superior de Ingenieros de Telecomunicación, Universidad Politécnica de Madrid, Spain, Shalini Srivastava, Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai 400076, India, Krista R Khiangte, Department of Physics, Indian Institute of Technology Bombay, Mumbai 400076, India, Sudipta Das, Department of Physics, Indian Institute of Technology Bombay, Mumbai 400076, India, and Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai 400076, India, Udayan Ganguly, Apurba Laha, Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai 400076, India, and Suddhasatta Mahapatra, Department of Physics, Indian Institute of Technology Bombay, Mumbai 400076, India.

Abstract: “As demands for data storage capability continue to increase, nonvolatile memory devices with discrete nanocrystals as the charge-storage nodes are being extensively investigated. To alleviate scaling issues, use of metal-nanocrystal-based ultrahigh-bit-density memory devices, capable of multilevel cell operations, have been proposed and studied widely. Here we propose a nonvolatile floating gate memory, utilizing nanocrystals of the group-IV metal, β-Tin (β-Sn), which spontaneously self-assemble on a variety of high-k dielectric oxides and silicon during molecular beam epitaxy at low temperatures. In metal-oxide-semiconductor memory devices, we demonstrate a large memory window (∼3V) at moderate operating voltages of ±6V and investigate the retention and endurance characteristics. The observed results are promising for realization of memory devices, compatible with the silicon complementary-metal-oxide-semiconductor technology.“