FMS: PLDA Wins PCIe 5.0 Design

PLDA SASU, a French firm in PCIe IP and interconnect solutions, announced a PCIe 5.0 design win on 5nm process node.

XpressRICH-AXI Controller IP for PCIe 5.0

Its PCIe 5.0 Controller IP was selected for its design and compatibility with PCIe PHYs, and also for tech support, its ease of customization and company’s integration expertise.

PCIe 5.0 technology is experiencing a rapid adoption rate, fueled by the demand for more bandwidth in datacenters. PLDA’s silicon PCIe IP provides a risk-free interface solution, giving customers peace of mind and a time-to-market advantage. In addition, the firm and its team of architects and engineers go the extra mile to understand customer use cases and requirements and help with architecture choices, proposing design optimizations and assisting with critical implementation details.

PLDA was chosen because they delivered set of advantages including:

• Pre-verified, pre-validated silicon IP
• Assistance with IP integration
• Configurable IP, modified to meet exact design requirements via an intuitive GUI
• A team of engineers, ready to further tailor the IP to requirements and to provide design expertise beyond IP customization
• Extensive PHY integration expertise and a choice of pre-integrated, pre-validated PHY IP from multiple vendors and on a range of process nodes
• A team of verification experts
• Guidance and support from the RTL sign-off stage, to tape-out, and beyond

About PLDA PCIe 5.0 IP: PLDA’s PCIe 5.0 controller IP is available with either a native PCIe interface or with an AMBA AXI interconnect.

Features of the IP include:

• Configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation
• Designed to the PCIe 5.0, 4.0, and 3.1/3.0 specifications, as well as with version 5.x of the PHY Interface for PCIe (PIPE) specification
• Configurable to support endpoint, root port, switch port, and dual-mode topologies, allowing for a variety of use models

According to Arnaud Schleich, CEO, PLDA: “We are proud to be working with leading edge customers who are deploying the latest PCIe technology in their SoCs on the most advanced nodes available today. Our long history of first time silicon success is an important advantage to early adopters of new technologies.“

• Visit PLDA’s PCIe 5.0 IP with native user interface or PCIe 5.0 with AXI interconnect product page.
• Visit PLDA’s exhibit at the FMS, August 6-8, 2019 at the Santa Clara Convention Center, Santa Clara, CA.