Silicon Storage Technology Assigned Patent
Configuring array columns and rows for accessing flash memory cells
By Francis Pelletier | July 19, 2019 at 1:51 pmSilicon Storage Technology, Inc., San Jose, CA, has been assigned a patent (10,340,010) developed by Tran, Hieu Van, Ly, Anh, Vu, Thuan, San Jose, CA, Tiwari, Vipin, Dublin, CA, and Do, Nhan, Saratoga, CA, for “method and apparatus for configuring array columns and rows for accessing flash memory cells.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: ”In one embodiment of the present invention, one row is selected and two columns are selected for a read or programming operation, such that twice as many flash memory cells can be read from or programmed in a single operation compared to the prior art. In another embodiment of the present invention, two rows in different sectors are selected and one column is selected for a read operation, such that twice as many flash memory cells can be read in a single operation compared to the prior art.”
The patent application was filed on August 16, 2016 (15/238,681).