Sanmina Assigned Four Patents

PCIe SSD, SSD accelerator
Sanmina Corporation, San Jose, CA, has been assigned a patent (10,324,642) developed by Sweere, Paul, Foothill Ranch, CA, Patel, Jay, and Syed, Irfan, San Jose, CA, for  “PCIe SSD, SSD accelerator.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A peripheral component interconnect express, (PCIe) solid state drive, (SSD) accelerator, having a PCIe card and separate a flash daughter-card, is provided. By including flash memory devices on a separate daughter-card, the flash memory devices are thermally decoupled from the hotter devices on the main PCIe providing additional thermal operating margins for the entire design. Furthermore, as flash memory devices are the most likely part of the subsystem to wear out over time due, including flash memory devices on a separate daughter-card allows the flash memory devices to become a field replaceable unit that can be easily replaced. EEPROMs may be included on the flash daughter-card to record the current wear state of the NAND flash devices. Knowing the wear history of the flash memory device allows the seller to replace the flash daughter-card of a customer with a daughter-card having a similar wear state.”

The patent application was filed on June 9, 2014 (14/300,231).

Flow based services for flash storage
Sanmina Corporation, San Jose, CA, has been assigned a patent (10,313,236) developed by Livesey, Jon, San Jose, CA, Mehrotra, Sharad, Saratoga, CA, Gourley, Thomas, Ratcliffe, Julian, San Jose, CA, and Mills, Jack, San Carlos, CA, for a “method of flow based services for flash storage.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method is provided for use with a packet routing network in which one or more endpoints includes Flash storage, multiple endpoints are configured to impart services to packets, a distributed routing structure is provided that includes routing structure portions that are associated with endpoints and that indicate next hop destination endpoint addresses that collectively define multiple sequences of endpoints that each includes one or more endpoints configured to impart a service and an endpoint that includes Flash storage, packets received from an external network are propagated through defined sequences of endpoints, services are imparted to a received packet by endpoints that receive it in the course of its propagation.”

The patent application was filed on July 1, 2014 (14/321,262).

Cooling high density arrays of non-volatile memory mass storage devices
Sanmina Corporation, San Jose, CA, has been assigned a patent (10,251,315) developed by Mitchell, Matthew Phillip, Colorado Springs, CO, McCabe, Eugene, Fremont, CA, Kumar, Ritesh, Lee, Donald Chong, and Schuette, Franz Michael, Colorado Springs, CO, for “apparatuses and methods for cooling high density arrays of non-volatile memory mass storage devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”One feature pertains to cooling of a high density array of non-volatile memory mass storage devices within a computer enclosure. A coolant is moved through the enclosure through two separate air paths, each serving approximately half of the mass storage devices. The two air paths are interleaved in a central duct ported to a frontal and a rear plenum. The central duct contains two groups of fans with a flow axis perpendicular to the plane of the server enclosure but with opposite flow direction with the two groups vertically offset relative to each other. The two paths are separated from each other through dividers. Both paths intake coolant from the cold isle and exhaust the coolant to the hot isle. The non-volatile memory mass storage devices include electromechanical and solid state devices.”

The patent application was filed on April 20, 2018 (15/959,127).

Non-volatile dual in-line memory module, (NVDIMM) multichip package
Sanmina Corporation, San Jose, CA, has been assigned a patent (10,199,364) developed by Lalam, Arvindhkumar, Carlsbad, CA, and Shen, Alec C., Irvine, CA, for a “non-volatile dual in-line memory module, (NVDIMM) multichip package.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A single multichip package is provided, comprising: a substrate having opposing upper and lower surfaces. A first die is mounted on the upper surface of the substrate and includes one or more non-volatile memory devices. A second die is mounted on the upper surface of the substrate, and includes at least one of:, (a) a non-volatile memory controller that facilitates transfer of data to/from the one or more non-volatile memory devices, (b) a register clock driver for volatile memory devices, and/or, (c) one or more multiplexer switches configured to switch between two or more of the volatile memory devices. A plurality of wire bonds connect the first and second dies. A plurality of solder balls are located on the lower surface of the substrate for mounting the single multichip package to a printed circuit board, the plurality of solder balls electrically coupled to the first die and the second die.”

The patent application was filed on May 19, 2017 (15/600,690).