PCI-SIG: Viavi Demonstrated PCIe 5.0 Test Platform
Evolution of Xgig 4K16 analyzer/jammer for PCIe 4.0
This is a Press Release edited by StorageNewsletter.com on June 28, 2019 at 2:24 pmViavi Solutions Inc. has showed a demonstration of protocol analysis for the recently completed PCIe 5th generation data communication standard.
Xgig 4k16 Pci Express 4.0 Protocol Analyzer Jammer
The demonstration occured at the PCI-SIG Developers Conference, June 18-19, in the Santa Clara Convention Center, CA.
PCIe 5.0 – the next revision of the serial computer expansion bus standard – will double the capacity over a PCIe link to 32Gb/s per unidirectional channel or greater than one terabit per second across the common 16-lane bidirectional slot interface.
This acceleration of speed correlates with the performance demands of emerging bandwidth- and compute-intensive applications such as 400GbE, IoT, hyperscale and AI. Component manufacturers need test platforms that will validate performance according to the standard, while maintaining familiar user interfaces and management environments to minimize training needs and start-up costs.
The company’s demonstration is based on the Xgig platform, enabling detailed functional and performance analysis of the PCIe 5.0 protocol, supporting operation at 32 giga-transfers per-second (GT/s).
The firm’s family of protocol analyzers has addressed all of the test requirements of the PCIe 4.0 ecosystem. The Xgig offers visibility into PCIe 4.0 traffic flows with trace and analysis and jamming, supporting lane widths of x1, x2, x4, x8, and x16 at link speeds of 2.5GT/s, 5.0 GT/s, 8.0GT/s and 16GT/s.
“The ability to test computing and storage network equipment and identify how and when a system fails is key to developing the most robust, high-performance solutions possible for data-heavy applications,” said Tom Fawcett, VP and GM, lab and production business unit, Viavi. “What really puts Viavi at the forefront of the industry is our willingness to be both market-focused and standards-focused – while the industry is still preparing for PCIe 5.0, we are involved with the key enablers of that ecosystem, participating in standardization efforts but also working with our customers to validate early prototypes.“