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Astera Labs Collaborates With Synopsys

To develop PCIe 5.0 connectivit for next-gen servers running on AWS

Synopsys, Inc.  announced that Astera Labs, Inc. utilized its Fusion Design Platform, Verification Continuum Platform, and Design Services to develop its connectivity technology for next-generation servers, all running on AWS.

The collaboration represents two game-changing industry milestones: a large-scale design implemented and verified from start to finish on a third-party public cloud, and a PCIe 5.0 retimer for heterogeneous compute and workload-optimized servers.

At Astera Labs, we are intensely focused on delivering high-quality solutions to our customers. We collaborated with Synopsys, a leader in EDA tools and PCIe technology, to ensure our products meet PCIe Gen-5 specifications and are geared for high-volume manufacturing,” said Jitendra Mohan, CEO, Astera Labs. “Our HPC infrastructure is hosted entirely on AWS and we heavily leveraged the scale of AWS and the cloud-scalability of Synopsys tools to accelerate our development schedule.

We are excited to collaborate with Synopsys, a market leader in chip design and verification software. Together, we are providing groundbreaking cloud solutions for our mutual semiconductor customers, which represent a significant milestone, creating smart products and devices for solutions involving IoT, machine learning, artificial intelligence, and big data,” said Terry Wise, VP, channels and alliances, AWS. “By leveraging the power of AWS, Synopsys is able to further semiconductor innovation and help Astera Labs reduce time-to-results.

In our collaboration with industry leaders and our ecosystem, we continue to work closely with innovators to enable next-generation designs with a broad and complete solution,” said Deirdre Hanford, co-GM of the design group, Synopsys. “Our collaboration with pioneers such as Astera Labs breaks new ground in what can be achieved in combining leading EDA technology and cloud computing.

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