Apacer CV110-SD and CV110-microSD Cards, Up to 256GB, With Toshiba 64-Layer TLC 3D BiCS3 NAND
Compatible with SD Card Association specifications, including Physical Layer Specification Version 6.1 and Security Specification V4.0
This is a Press Release edited by StorageNewsletter.com on May 7, 2019 at 2:11 pmApacer Technology, Inc. introduces the CV110-SD and CV110-MSD cards, which feature compact size, performance, security, reliability, low power consumption and compatibility.
They support capacities up to 256GB and are compatible with card readers running up to SD card version 6.1, but also backward compatible with version 3.0 and 2.0. They are compatible with the SD Card Association specs, including Physical Layer Specification Version 6.1 and Security Specification V4.0.
Theese cards come with a 9-pin/8-pin interface designed to operate at a maximum operating frequency of 208MHz. They can alternate communication protocols between SD mode and SPI mode. And they perform data error detection and correction while maintaining low power consumption. The features of the products make them for hand-held applications with customized firmware, such as the healthcare, transportation, embedded and IPC industries. As 5G and IoT products become more mature, the cards will suit most deployments in edge-computing technology.
Toshiba’s industrial-grade 64-Layer TLC 3D BiCS3 NAND under hood
When building products like the CV110-SD and CV110-MSD cards, the company continues to use only Toshiba Memory Corp.‘s ICs, which offer a total number of P/E cycles (3,000) and support operation at temperatures between -40 °C and 85°C.
Prevent data corruption with DataRAID algorithm
The firm’s DataRAID algorithm applies an additional level of protection and error-checking. Using it, a certain amount of space is given over to aggregating and re-saving the existing parity data used for error checking. So, in the event that data becomes corrupted, the parity data can be compared to the existing uncorrupted data and the content of the corrupted data can be rebuilt.
Smart Read Refresh makes it for read-intensive operations
The company’s Smart Read Refresh plays a proactive role in avoiding read disturb errors from occurring to ensure health status of all blocks of NAND flash. Developed for read-intensive applications in particular, Smart Read Refresh is employed to make sure that during read operations, when the read operation threshold is reached, the data is refreshed by re-writing it to a different block for subsequent use.