R&D: SOML Read, Rethinking Read Operation Granularity of 3D NAND SSDs

ACM Digital Library has published, in ASPLOS ’19 Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, an article written by Chun-Yi Liu, Pennsylvania State University, state college, PA, USA, Jagadish B. Kotra, AMD Research, Austin, TX, USA, Myoungsoo Jung, Korea Advanced Institute of Science and Technology, KAIST, Daejeon, South Korea, Mahmut T. Kandemir, and Chita R. Das, Pennsylvania State University, state college, PA, USA.

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Abstract: “NAND-based solid-state disks (SSDs) are known for their superior random read/write performance due to the high degrees of multi-chip parallelism they exhibit. Currently, as the chip density increases dramatically, fewer 3D NAND chips are needed to build an SSD compared to the previous generation chips. As a result, SSDs can be made more compact. However, this decrease in the number of chips also results in reduced overall throughput, and prevents 3D NAND high density SSDs from being widely-adopted. We analyzed 600 storage workloads, and our analysis revealed that the small read operations suffer significant performance degradation due to reduced chip-level parallelism in newer 3D NAND SSDs. The main question is whether some of the inter-chip parallelism lost in these new SSDs (due to the reduced chip count) can be won back by enhancing intra-chip parallelism. Motivated by this question, we propose a novel SOML (Single-Operation-Multiple-Location) read operation, which can perform several small intra-chip read operations to different locations simultaneously, so that multiple requests can be serviced in parallel, thereby mitigating the parallelism-related bottlenecks. A corresponding SOML read scheduling algorithm is also proposed to fully utilize the SOML read. Our experimental results with various storage workloads indicate that, the SOML read-based SSD with 8 chips can outperform the baseline SSD with 16 chips.“