California Institute of Technology Assigned Patent

California Institute of Technology, Pasadena, CA, has been assigned a patent (10,224,111) developed by Li, Yue, Pasadena, CA, and Bruck, Jehoshua, La Canada-Flintridge, CA, for “error characterization and mitigation for 16nm MLC NAND flash memory under total ionizing dose effect.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.”

The patent application was filed on December 20, 2017 (15/849,423).