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Marvell Assigned Eight Patents

Error correction for storage devices, compensating for radial incoherence associated with reading servo sectors, hypervisor assisted control of CPU access to externally managed physical memory, storing data to SSD device based on data classification, determining read-head deviation using orthogonal preambles, FIFO for providing access to memory shared by multiple devices, storage devices and controlling storage device, multi-bank memory with multiple read ports and multiple write ports per cycle

Error correction for storage devices
Marvell World Trade Ltd., St. Michael, Barbados, has been assigned a patent (10,186,296) developed by Burd, Gregory, Varnica, Nedeljko, and Tang, Heng, San Jose, CA, for a “
log file management.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A method for redundantly storing data includes receiving data at a storage controller, partitioning the data into a plurality of data blocks, generating a first error correction code associated with a first page within the plurality of data blocks, and generating a first redundancy code associated with at least two data blocks within the plurality of data block. The first redundancy code provides additional error recovery if the first error correction code fail. The method further includes storing the plurality of data blocks, the first error correction code, and the first redundancy code across a plurality of solid state storage devices.

The patent application was filed on March 14, 2018 (15/921,610).

Compensating for radial incoherence associated with reading servo sectors
Marvell International Ltd., Hamilton, Bermuda, has been assigned a patent (10,170,142) developed by Khatami, Seyed Mehrdad, Foster City, CA, and Oberg, Mats, San Jose, CA, for “
system and method for compensating for radial incoherence associated with reading servo sectors.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A system for compensating RI while reading servo data from a rotating storage medium is provided and includes an equalizer, a Viterbi detector, and a servo control module. The equalizer receives a digital signal including a bit sequence of the servo data read from the rotating storage medium and equalizes the digital signal via filters. Some of the filters are to phase rotate the digital signal to generate phase rotated signals. The Viterbi detector operates based on a Viterbi state machine, which includes main branches having sub-branches, where: each of the main branches is to receive the phase rotated signals respectively at corresponding ones of the sub-branches, and the Viterbi detector is to determine branch metrics for each of the sub-branches, determine a minimum branch metric for each of the main branches, and process the minimum branch metric using an add-compare-select process to determine a most likely received bit sequence.

The patent application was filed on September 19, 2017 (15/708,668).

Hypervisor assisted control of CPU access to externally managed physical memory
Marvell International Ltd., Hamilton, Bermuda, has been assigned a patent (10,162,665) developed by Eidelman, Anton, Palo Alto, CA, for a “
hypervisor assisted control of CPU access to externally managed physical memory.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A memory management module receives a request to access a page in a memory, sends the request to a memory controller controlling the memory if the page is available in the memory, and if the page is unavailable,(i) does not send the request to the memory controller, and,(ii) generates a first exception. A hypervisor intercepts the first exception and sends a second exception to an operating system. The operating system includes a handler to, in response to the second exception, selectively request the memory controller to obtain the page from a storage device into the memory, and to suspend execution of a first thread issuing the request on a processor until the page becomes available in the memory, and a kernel to schedule execution of a second thread on the processor until the page becomes available, or to idle the processor until the page becomes available.

The patent application was filed on July 20, 2016 (15/214,822).

Storing data to solid state storage device based on data classification
Marvell World Trade Ltd., St. Michael, Barbados, has been assigned a patent (10,157,022) developed by Gole, Abhijeet P., Cupertino, CA, for “
methods and apparatus for storing data to a solid state storage device based on data classification.

The abstract of the patent published by the U.S. Patent and Trademark Office states: Systems and methods for storing data to a non-volatile storage device are provided. A request to store data to the storage device at a given address corresponding to one of a plurality of regions of the storage device is received. A region classification map associated with the storage device associates a classification with each of the plurality of regions. A determination is made based on the region classification map as to which classification is associated with the one of the plurality of regions corresponding to the given address. The data is stored at the given address in response to determining that the one of the plurality of regions is associated with a first classification. The data is stored to an alternate location in response to determining that the one of the plurality of regions is associated with a second classification.

The patent application was filed on January 26, 2017 (15/416,643).

Determining read-head deviation using orthogonal preambles
Marvell World Trade Ltd., St. Michael, Barbados, has been assigned a patent (10,147,450) developed by Nangare, Nitin, Santa Clara, CA, for “
method and apparatus for determining read-head deviation using orthogonal preambles.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A storage device includes read circuitry having a read head having a detector that outputs signals representing data from a first track and an adjacent track. The read head is subject to off-track excursions during which the read head detects signals from both the first track and an adjacent track. Data on each track includes a preamble including a repeating pattern. The repeating pattern in any first track is orthogonal to the repeating pattern in any track adjacent to the first track. The read circuitry also includes respective Discrete Fourier Transform circuits to identify components in the signals corresponding to respective frequencies characteristic of the repeating pattern on the first track and the repeating pattern on the second track, and computation circuitry to determine from the components a ratio by which the read head is off-track. Corresponding methods are provided for operating such a storage device and for reading data.

The patent application was filed on January 3, 2018 (15/861,249).

FIFO for providing access to memory shared by multiple devices
Marvell Israel, (M.I.S.L) Ltd, Yokneam, Israel, has been assigned a patent (10,146,434) developed by Bromberg, Dror, Michmoret, Israel, and Sherman, Roi, Yokneam, Israel, for “
FIFO systems and methods for providing access to a memory shared by multiple devices.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A First-In-First-Out, (FIFO) system and a method for providing access to a memory shared by a plurality of N clients are provided. The memory has a single memory space for holding a plurality of data storage arrays that are respectively configured to store data in a first-in-first-out manner for corresponding clients among the N clients. An arbiter is configured to receive memory access requests from two or more of the N clients to perform a FIFO operation, to push data into a corresponding storage array or to pop data from the corresponding storage array in response to the memory access request. The arbiter is configured to select a first at least one of the clients to perform a first FIFO operation in a first memory operation cycle and to select a second at least one of the clients to perform a second FIFO operation in a second memory operation cycle.

The patent application was filed on May 10, 2016 (15/150,931).

Storage devices and controlling storage device
Marvell International Ltd., Hamilton, Bermuda, has been assigned a patent (10,126,987) developed by Jin, Chao, Xi, WeiYa, Pantelis, Alexopoulos, Lim, Chun Teck, and Ching, Zhi Yong, Singapore, Singapore, for “
storage devices and methods for controlling a storage device.

The abstract of the patent published by the U.S. Patent and Trademark Office states: According to various embodiments, a storage device may be provided. The storage device may include: a first memory including a magnetic recording medium and configured to store user data, a second memory including a solid state drive recording medium and configured to store at least one of metadata or other frequently accessed data, and an interface configured to access the second memory using a pre-determined communication protocol.”

The patent application was filed on October 18, 2013 (14/058,156).

Multi-bank memory with multiple read ports and multiple write ports per cycle
Marvell Israel, (M.I.S.L) Ltd, Yokneam, Israel, has been assigned a patent (10,089,018) developed by Bromberg, Dror, Michmoret, Israel, Sherman, Roi, Yokneam, Israel, and Zemach, Rami, Givat Shapira, Israel, for “
multi-bank memory with multiple read ports and multiple write ports per cycle.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A method for data storage includes receiving one or more read commands and one or more write commands, for execution in a same clock cycle in a memory array that comprises multiple single-port memory banks divided into groups. The write commands provide data for storage but do not specify storage locations in which the data is to be stored. One or more of the groups, which are not accessed by the read commands in the same clock cycle, are selected. Available storage locations are chosen for the write commands in the single-port memory banks of the selected one or more groups. During the same clock cycle, the data provided in the write commands is stored in the chosen storage locations, and the data requested by the read commands is retrieved. Execution of the write commands is acknowledged by reporting the chosen storage locations.

The patent application was filed on April 17, 2016 (15/130,980).

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