Floadia Assigned Patent

Floadia Corporation, Tokyo, Japan, has been assigned a patent (10,038,101) developed by Shinagawa, Yutaka, Taniguchi, Yasuhiro, Kasai, Hideo, Sakurai, Ryotaro, Kawashima, Yasuhiko, Toya, Tatsuro, and Okuyama, Kosuke, Koadira, Japan, for a “memory cell and non-volatile semiconductor storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A voltage applied to a bit line or to a source line is reduced to a value allowing a first or second select gate structure to block electrical connection between the bit line and a channel layer or between the source line and the channel layer, irrespective of a voltage needed to inject charge into a charge storage layer by a quantum tunneling effect. In accordance with the reduction in voltage(s) applied to the bit line and the source line, thickness of each of a first and second select gate insulating films of the first and second select gate structure is reduced. High-speed operation is achieved correspondingly. With the reduction in voltage(s) applied to the bit and source lines, thickness of a gate insulating film of a field effect transistor in a peripheral circuit controlling a memory cell is reduced. The area of the peripheral circuit is reduced correspondingly.”

The patent application was filed on October 6, 2015 (15/515,199).