SanDisk Assigned Ten Patents

Three-dimensional memory
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,014,316) developed by Yu, Fabo, San Ramon, CA, Pachamuthu, Jayavel, San Jose, CA, Sel, Jongsun, Los Gatos, CA, Pham, Tuan, San Jose, CA, Chu, Cheng-Chung, Milpitas, CA, Lee, Yao-Sheng, Tampa, FL, Yamaguchi, Kensuke, Terahara, Masanori, and Minagawa, Shuji, Yokkaichi, Japan, for a “three-dimensional memory device with leakage reducing support pillar structures and method of making thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers and at least one semiconductor material layer can be sequentially deposited in each of the memory openings and the support openings. The at least one semiconductor material layer is removed from inside the support openings, while the at least one semiconductor material layer is not removed from inside the memory openings. Memory stack structures and support pillar structures are formed in the memory openings and the support openings, respectively. The sacrificial material layers are replaced with electrically conductive layers. Removal of the at least one semiconductor material layer from the support pillar structures reduces or eliminates leakage current through the support pillar structures.”

The patent application was filed on October 18, 2016 (15/296,380).

Smart skip verify mode for programming memory
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,014,063) developed by Tseng, Huai-Yuan, San Ramon, CA, Dutta, Deepanshu, Fremont, CA, Tseng, Tai-Yuan, Shah, Grishma, and Masuduzzaman, Muhammad, Milpitas, CA, for a “smart skip verify mode for programming a memory device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Techniques are provided to adaptively determine when to begin verify tests for a particular data state based on a programming progress of a set of memory cells. A count is made in a program-verify iteration of memory cells which pass a verify test of a state N. The count is used to determine a subsequent program-verify iteration in which to perform a verify test of a higher state as a function of an amount by which the count exceeds a threshold count. In another approach, an optimum verify scheme is implemented on a per-group basis for groups of adjacent memory cells at different heights in a 3D memory device. In another approach, an optimum verify scheme is implemented on a per-layer basis for sets of memory cells at a common height or word line layer in a 3D memory device.”

The patent application was filed on October 30, 2015 (14/928,853).

Memory system and reducing read disturb errors
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,014,060) developed by Tuers, Daniel E., Kapaa, HI, Manohar, Abhijeet, Bangalore, India, Thomas, Nicholas, Dundee, Great Britain, and Hsu, Jonathan, Newark, CA, for a “memory system and method for reducing read disturb errors.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory system and method for reducing read disturb errors are disclosed. In one embodiment, a memory system is provided comprising a plurality of blocks of memory and a controller. The controller is configured to detect a read disturb error in a block, identify data that caused the read disturb error, and move the data that caused the read disturb error to a block with a higher read endurance. This can be done by assigning read counters to blocks to determine frequently-read data, and storing that data in a separate block until it is less frequently read and will likely not cause additional read disturb errors.”

The patent application was filed on March 31, 2015 (14/675,107).

Changing storage parameters
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,014,056) developed by Lee, Aaron, Mountain View, CA, Chen, Yi-Chieh, San Jose, CA, Koh, Anne, Fremont, CA, Kathawala, Gulzar, Campbell, CA, and Kochar, Mrinal, San Jose, CA, for a “changing storage parameters.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Apparatuses, systems, methods, and computer program products are disclosed for changing storage parameters. An integrated circuit, (IC) memory element receives a command to change a value of a parameter associated with the IC memory element. A parameter includes a setting for one or more storage operations of an IC memory element. An IC memory element receives one or more data sets with a command. A data set includes an identifier associated with a parameter to be changed and a new value for the parameter. Each of one or more data sets is received at a same data rate as a command. An IC memory element writes, for each of one or more data sets, a new value for a parameter to a storage location associated with the parameter.”

The patent application was filed on May 18, 2017 (15/598,936).

Atomic storage operations
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,013,354) developed by Flynn, David, Sandy, UT, Uphoff, Stephan, Roswell, GA, Ouyang, Xiangyong, Columbus, OH, Nellans, David, Salt Lake City, UT, and Wipfel, Robert, Draper, UT, for an “apparatus, system, and method for atomic storage operations.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage layer, (SL) for a non-volatile storage device presents a logical address space of a non-volatile storage device to storage clients. Storage metadata assigns logical identifiers in the logical address space to physical storage locations on the non-volatile storage device. Data is stored on the non-volatile storage device in a sequential log-based format. Data on the non-volatile storage device comprises an event log of the storage operations performed on the non-volatile storage device. The SL presents an interface for requesting atomic storage operations. Previous versions of data overwritten by the atomic storage device are maintained until the atomic storage operation is successfully completed. Data pertaining to a failed atomic storage operation may be identified using a persistent metadata flag stored with the data on the non-volatile storage device. Data pertaining to failed or incomplete atomic storage requests may be invalidated and removed from the non-volatile storage device.”

The patent application was filed on July 28, 2011 (13/193,559).

Storage module and scheduling memory operations
for peak-power management and balancing
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,013,345) developed by Erez, Eran, San Jose, CA, and Hsu, Cynthia, Fremont, CA, for a “storage module and method for scheduling memory operations for peak-power management and balancing.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage module and method for scheduling memory operations for peak-power management and balancing are provided. In one embodiment, a storage module maintains a count of time slots over a period of time. The period of time corresponds to an amount of time between periodic power peaks of a memory operation. For each time slot, the storage module determines whether to commence a memory operation on one or more of the plurality of memory dies based on whether a power peak generated in the time slot by the memory operation would exceed a power threshold allowed for the time slot. Other embodiments are provided.”

The patent application was filed on September 17, 2014 (14/489,179).

Computer readable media for optimizing storage device bus
and resource utilization by host realignment
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,013,178) developed by Vishne, Gadi, Petach-Tikva, Israel, Baron, Shai, Ramat-Hasharon, Israel, and Hahn, Judah Gamliel, Ofra, Israel, for “methods, systems and computer readable media for optimizing storage device bus and resource utilization by host realignment.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method for optimizing storage device bus and resource utilization using host realignment includes detecting a first write command for writing data from a host device to a storage device. The method further includes determining whether the first write command includes addressing that is misaligned with regard to storage device resource assignments. The method further includes, in response to determining that the first write command includes addressing that is misaligned with respect to storage device resource assignments: determining an amount to shift the misaligned addressing to align the addressing with the storage device resource assignments, and notifying the host device of the misaligned addressing. The method further includes performing a host realignment according to the amount determined to shift the misaligned addressing.”

The patent application was filed on April 30, 2016 (15/143,538).

Data storage with command buffer management
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,013,173) developed by More, Shankar, Pune, India, and Sundrani, Kapil, Bangalore, India, for a “data storage device with command buffer management module and method of operating same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An electronic device including a communication interface and a command buffer coupled to the communication interface. The communication interface is configured to receive commands from a plurality of initiator devices, and the command buffer is configured to store the commands. The electronic device further includes a command buffer management module coupled to the command buffer. The command buffer management module is configured to generate a message indicating a remaining allowed storage size associated with the command buffer. The communication interface is further configured to enable communication of the message to a particular initiator device of the plurality of initiator devices. The message may enable the particular initiator device to hold off on sending one or more other commands to the command buffer if the remaining allowed storage size fails to satisfy a threshold storage size.”

The patent application was filed on July 29, 2015 (14/812,619).

Preliminary ready indication for memory operations on non-volatile memory
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,002,649) developed by Golan, Ronen, Petah-Tikva, Israel, Shpaizman, Roie, Sede Hemed, Israel, Bazarsky, Alex, Holon, Israel, Elmoalem, Eli, Nili, Israel, Shah, Grishma, Milpitas, CA, and Alrod, Idan, Herzeliya, Israel, for a “preliminary ready indication for memory operations on non-volatile memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Apparatuses, systems, methods, and computer program products are disclosed for providing a preliminary ready indication for non-volatile memory. A non-volatile memory element initiates a write operation for one or more storage cells of the non-volatile memory element. The non-volatile memory element determines whether a progress threshold is satisfied for the write operation. The non-volatile memory element provides a preliminary ready indication, indicating that the progress threshold is satisfied.”

The patent application was filed on February 23, 2017 (15/440,975).

Storage and gray levels of read security
SanDisk Technologies LLC, Plano, TX, has been assigned a patent (10,002,265) developed by Shapira, Ofer, Herzliya, Israel, Hahn, Judah Gamliel, Ofra, Israel, Bazarsky, Alexander, Holon, Israel, Navon, Ariel, Revava, Israel, and Berler, Danny, Tel-Mond, Israel, for a “storage system and method for providing gray levels of read security.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage system and method for providing gray levels of read security are provided. In one embodiment, a storage system is provided comprising a memory and a controller in communication with the memory. The controller is configured to perform a test of a security feature of the storage system, and in response to failure of the test of the security feature of the storage system, degrade a subsequent read of a set of locations in the memory. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.”

The patent application was filed on November 16, 2016 (15/353,511).