AMD Assigned Patent
Technique to improve performance of memory copies and stores
By Francis Pelletier | February 15, 2018 at 2:19 pmAdvanced Micro Devices, Inc. (AMD), Sunnyvale, CA, has been assigned a patent (9,870,318) developed by Goodwin, Jeremy P., Bellevue, WA, for a “technique to improve performance of memory copies and stores.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A system and method for efficiently relocating and initializing a block of memory of the computer system. For data initialization and data relocation, multiple registers in a processor are used for intermediate storage of data to be written into the memory. Regardless of whether the amount of data to initialize or relocate is aligned with the register data size, the processor writes the data into the destination buffer with write operations that only utilize the register data size. The write operations utilize the register data size when each of the start and the end of the destination buffer is aligned with the register width, when the start of the destination buffer is unaligned with the register width, when a source buffer and the destination buffer are unaligned with one another for a copy operation, and when the source buffer and the destination buffer overlap.”
The patent application was filed on July 23, 2014 (14/339,301).