Super Talent Assigned Two Patents

Virtual memory device, application/driver for enhanced flash endurance
Super Talent Technology, Corp., San Jose, CA, has been assigned a patent (9,548,108) developed by Yu, Frank, Palo Alto, CA, Ma, Abraham C., Fremont, CA, Chen, Shimon, Los Gatos, CA, and Yan, Yi Syu, Bade, Taiwan, for a “Virtual memory device, (VMD) application/driver for enhanced flash endurance.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A Virtual-Memory Device, (VMD) driver and application execute on a host to increase endurance of flash memory attached to a Super Enhanced Endurance Device, (SEED) or Solid-State Drive, (SSD). Host accesses to flash are intercepted by the VMD driver using upper and lower-level filter drivers and categorized as data types of paging files, temporary files, meta-data, and user data files, using address ranges and file extensions read from meta-data tables. Paging files and temporary files are optionally written to flash. Full-page and partial-page data are grouped into multi-page meta-pages by data type before storage by the SSD. Ramdisks and caches for storing each data type in the host DRAM are managed and flushed to the SSD by the VMD driver. Write dates are stored for pages or blocks for management functions. A spare/swap area in DRAM reduces flash wear. Reference voltages are adjusted when error correction fails.“

The patent application was filed on December 18, 2014 (14/575,943).

Endurance translation layer, and diversion of temp files
for reduced flash wear of super-endurance solid-state drive
Super Talent Technology, Corp., San Jose, CA, has been assigned a patent (9,547,589) developed by Yu, Frank, Palo Alto, CA, Ma, Abraham C., Fremont, CA, and Chen, Shimon, Los Gatos, CA, for a “Endurance translation layer, (ETL) and diversion of temp files for reduced flash wear of a super-endurance solid-state drive.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A flash drive has increased endurance and longevity by reducing writes to flash. An Endurance Translation Layer, (ETL) is created in a DRAM buffer and provides temporary storage to reduce flash wear. A Smart Storage Switch, (SSS) controller assigns data-type bits when categorizing host accesses as paging files used by memory management, temporary files, File Allocation Table, (FAT) and File Descriptor Block, (FDB) entries, and user data files, using address ranges and file extensions read from FAT. Paging files and temporary files are never written to flash. Partial-page data is packed and sector mapped by sub-sector mapping tables that are pointed to by a unified mapping table that stores the data-type bits and pointers to data or tables in DRAM. Partial sectors are packed together to reduce DRAM usage and flash wear. A spare/swap area in DRAM reduces flash wear. Reference voltages are adjusted when error correction fails.“

The patent application was filed on December 18, 2014 (14/575,872).