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Purdue Research Foundation Assigned Patent

Electronic memory including ROM and RAM

Purdue Research Foundation, West Lafayette, IN, has been assigned a patent (9,552,859) developed by Roy, Kaushik, West Lafayette, IN, Lee, Dongsoo, White Plains, NY, and Fong, Xuanyao, Lafayette, IN, for a “electronic memory including ROM and RAM.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An electronic data-storage apparatus having ROM embedded in an STT-MRAM. The apparatus comprises at least two bit lines, a plurality of bit cells, each including, connected to a source line, (SL), a series connection, (in any order) of a selection element, (e.g., transistor gated by word line WL, a resistive storage element, (e.g., MTJ), and a permanent connection to one of the bit lines, (e.g., BL0, BL1). The apparatus may also include a ROM sense amplifier which is configured to precharge two output nodes connected to respective ones of the bit lines, so that the jumper in a selected memory cell pulls one of the output nodes to a first reference potential, (e.g., GND) and the ROM sense amplifier pulls the other of the output nodes to a second reference potential, (e.g., Vdd).

The patent application was filed on May 27, 2015 (14/723,450).

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