Altera Assigned Patent

Altera Corporation, San Jose, CA, has been assigned a patent (9,548,103) developed by Pan, Philip, Fremont, CA, Lee, Andy L., San Jose, CA, Zhou, Lu, Santa Clara, CA, and Kadkol, Aniket, Cupertino, CA, for a “scaleable look-up table based memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An integrated circuit having a logic element that includes an array of storage elements convertibly functioning as either a configuration random access memory (CRAM) or a static random access memory (SRAM) is provided. The logic element includes first and second pairs of data paths having dedicated multiplexers. In one embodiment, the first and second pairs of data paths are multiplexed into bit lines of a row of the array. The logic element also includes a data path control block generating control signals for each of the dedicated multiplexers. The control signals determine whether the storage elements function as a CRAM or a SRAM. A method for selectively configuring a memory array between a CRAM mode and SRAM mode are provided.“

The patent application was filed on July 23, 2015 (14/806,962).