Cadence Design Systems Assigned Patent

Cadence Design Systems, Inc., San Jose, CA, has been assigned a patent (9,448,883) developed by Shrader, Steven, Meridian, ID, for a “system and method for allocating data in memory array having regions of varying storage reliability.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A system and method are provided for efficient allocation of data in a memory array having regions of varying storage reliability. Storage locations for bands of data are selectively allocated in a manner which evenly distributes the probability of error in the data when stored in the memory array in spite of the varying storage reliability. A distribution controller is provided to effect such distribution of data to maintain a collective error rate of each data band within a preselected or predetermined range. The system and method also generally provide for storing at least a first and a second data band in different corresponding sets of storage channels. The system and method also generally provide for at least one of the data bands being stored in regions of differing reliability across the set of storage channels therefor.“

The patent application was filed on December 4, 2012 (13/693,739).