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Avago Assigned Eleven Patents

Magnetoresistive reader for 2D magnetic recording, internal HDD compression, preamplifier common-mode noise rejection for 2D magnetic recording, preamplifier crosstalk correction in array reader magnetic recording system, cache load balancing in storage controllers, controllers for affiliation management, temporal tracking of cache data, caching hinted data, I/O processing using out-of-band hinting to block driver or storage controller, hinted cache data removal, coordination techniques for redundant array of independent disks storage controllers

Magnetoresistive reader for two-dimensional magnetic recording
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,437,219) developed by Wilson, Ross S., Menlo Park, CA, O’Brien, Scott M., Gleason, Jeffrey A., Mendota Heights, MN, Brenden, Jason P., Woodbury, MN, Bhaumik, Jaydip, Longmount, CO, and Fitzgerald, David, Inver Grove Heights, MN, for a “magnetoresistive reader for two-dimensional magnetic recording.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An apparatus for two-dimensional magnetic recording includes a storage medium, an array of magnetoresistive read heads disposed adjacent the storage medium and spaced to read a data track, a number of leads connected to the array of magnetoresistive read heads, and number of bias circuits connected to the array of read heads by the leads. The bias circuits can be configured to independently bias each of the array of read heads with the array of read heads connected in series or in parallel.

The patent application was filed on September 10, 2015 (14/850,144).

Internal disk drive data compression
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (
9,436,550) developed by Yang, Shaohua, San Jose, CA, and Ahmed, Ebad, Cupertino, CA, for a “systems and methods for internal disk drive data compression.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The present invention is related to systems and methods for data storage compression. As an example, a system is discussed that includes a semiconductor device having a host interface, a compression circuit operable to compress a write data set received via the host interface, and a write channel circuit operable to apply an encoding algorithm to the compressed data set to yield an encoded data set.

The patent application was filed on November 18, 2013 (14/082,261).

Preamplifier common-mode noise rejection
for two-dimensional magnetic recording
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (
9,431,050) developed by Brenden, Jason P., Woodbury, MN, Fitzgerald, David, Inver Grove Heights, MN, Gleason, Jeffrey A., O’Brien, Scott M., Straub, Michael, Mendota Heights, MN, and Wilson, Ross S., Menlo Park, CA, for a “preamplifier common-mode noise rejection for two-dimensional magnetic recording.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An apparatus for two-dimensional magnetic recording includes an array reader with a number of magnetoresistive read sensors configured to read data from a storage medium. The magnetoresistive read sensors have a number of connection terminals, with at least one of the connection terminals being shared by more than one of the magnetoresistive read sensors. The apparatus also includes a number of low-noise amplifiers connected to the connection terminals, each configured to amplify a differential signal from a different one of the magnetoresistive read sensors. The apparatus also includes a number of impedance balancing networks connected to a subset of the connection terminals.

The patent application was filed on October 30, 2015 (14/928,399).

Preamplifier crosstalk correction in array reader magnetic recording system
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,401,175) developed by Bhaumik, Jaydip, Longmont, CO, Gleason, Jeffrey A., O’Brien, Scott M., Mendota Heights, MN, Oenning, Travis, San Jose, CA, and Wilson, Ross S., Menlo Park, CA, for a “preamplifier crosstalk correction in array reader magnetic recording system.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An apparatus for correcting crosstalk in an array reader magnetic recording system includes an array reader comprising a number of read heads operable to read data from a magnetic storage medium, a preamplifier configured to amplify the signals from the read heads, and a crosstalk correction circuit configured to reduce crosstalk between signals from the read heads.

The patent application was filed on July 21, 2015 (14/805,435).

Cache load balancing in storage controllers
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,400,759) developed by Maharana, Parag R., Fremont, CA, and Sampathkumar, Kishore K., Bangalore, India, for a “cache load balancing in storage controllers.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and structure are provided for cache load balancing in storage controllers that utilize Solid State Drive, (SSD) caches. One embodiment is a storage controller of a storage system. The storage controller includes a host interface operable to receive Input and Output, (I/O) operations from a host computer. The storage controller also includes a cache memory that includes an SSD. Further, the storage controller includes a cache manager that is distinct from the cache memory. The cache manager is able to determine physical locations in the multiple SSDs that are unused, to identify an unused location that was written to a longer period of time ago than other unused locations, and to store a received I/O operation in the identified physical location. Further, the cache manager is able to trigger transmission of the stored I/O operations to storage devices of the storage system for processing.

The patent application was filed on July 9, 2015 (14/795,543).

Controllers for affiliation managment
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,384,160) developed by Sterns, Randolph W., Arvada, CO, Hall, Randy K., Boulder, CO, and Schneider, Chad, Fort Collins, CO, for a “methods and controllers for affiliation managment.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and systems for managing Serial Advanced Technology Attachment, (SATA) affiliation transfers between a requesting controller and a granting controller of a storage system. After receiving an affiliation request from the requesting controller, the granting controller queries a number of commands that are queued locally at the granting controller. The granting controller grants the affiliation to the requesting controller after a period of time that is determined based on the queried number of commands that are queue locally.

The patent application was filed on September 4, 2008 (12/204,119).

Temporal tracking of cache data
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,384,138) developed by Shivashankaraiah, Vinay Bangalore, Bangalore, India, and Thillai, Kumaravel, Tamilnadu, India, for a “temporal tracking of cache data.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage system with a cache organizes cache windows into lists based on the number of cache lines accessed during input/output operations. The lists are maintained in temporal queues with cache windows transferred from prior temporal queues to a current temporal queue. Cache windows are removed from the oldest temporal queue and least accessed cache window list whenever cached data needs to be removed for new hot data.

The patent application was filed on May 13, 2014 (14/276,429).

Caching hinted data
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,384,135) developed by Agarwal, Vineet, Kanpur, India, Jain, Ashish, and Sharma, Amit Kumar, Bangalore, India, for a “system and method of caching hinted data.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The disclosure is directed to a system and method of cache management for a data storage system. According to various embodiments, the cache management system includes a hinting driver and a priority controller. The hinting driver generates pointers based upon data packets intercepted from data transfer requests being processed by a host controller of the data storage system. The priority controller determines whether the data packets are associated with at least a first, (high) priority level or a second, normal or low) priority level based upon the pointers generated by the hinting driver. High priority data packets are stored in cache memory regardless of whether they satisfy a threshold heat quotient, (i.e. a selected level of data transfer activity).

The patent application was filed on September 4, 2013 (14/017,766).

I/O processing using out-of-band hinting to block driver or storage controller
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,378,152) developed by Sampathkumar, Kishore Kaniyar, Bangalore, India, Maharana, Parag, Fremont, CA, Samanta, Sumanesh, and Purkayastha, Saugata Das, Bangalore, India, for a “systems and methods for I/O processing using out-of-band hinting to block driver or storage controller.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage subsystem can achieve more efficient I/O processing by enabling users to specify and pass out of band I/O hints comprising an object to be hinted, a hint type, and caching strategies associated with a hint type. A hinted object may be either a virtual device or a file. In addition to priority cache, hint types may include never-cache, sticky-cache, and volatile-cache. Hints may be passed via command-line or graphical-user interfaces.

The patent application was filed on May 9, 2014 (14/274,153).

Hinted cache data removal
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,378,151) developed by Agarwal, Vineet, Kanpur, India, Bhattarai, Durga Prasad, and Saha, Sourav, Bangalore, India, for a “system and method of hinted cache data removal.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The disclosure is directed to a system and method of cache management for a data storage system. According to various embodiments, the cache management system includes a hinting driver, a priority controller, and a data scrubber. The hinting driver generates pointers based upon data packets intercepted from data transfer requests being processed by a host controller of the data storage system. The priority controller determines whether the data transfer request includes a request to discard a portion of data based upon the pointers generated by the hinting driver. If the priority controller determines that data transfer request includes a request to discard a portion of data, the data scrubber locates and removes the portion of data from the cache memory so that the cache memory is freed from invalid data, (e.g. data associated with a deleted file).

The patent application was filed on September 4, 2013 (14/018,100).

Coordination techniques for redundant array
of independent disks storage controllers
Avago Technologies General IP, (Singapore) Pte. Ltd., Singapore, has been assigned a patent (9,378,103) developed by Madhusudana, Naresh, Krishnamurthy, Naveen, and Veerla, Sridhar Rao, Bangalore, India, for a “coordination techniques for redundant array of independent disks storage controllers.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and structure for coordinating between Redundant Array of Independent Disks, (RAID) storage controllers are provided. An exemplary system includes a RAID controller. The RAID controller includes a Peripheral Component Interconnect Express, (PCIe) interface, a Serial Attached Small Computer System Interface, (SAS) port operable to communicate with another RAID controller, and a command unit. The command unit is able to direct the interface to contact another PCIe interface at the other controller, to acquire an identifier of the other controller stored in a PCIe Inbound Map, (PIM) for the other interface, and to activate a feature for the controller that enables cooperative management of storage devices between the controller and the other controller, if the identifier of the other controller matches discovery information maintained at the controller.

The patent application was filed on May 19, 2014 (14/280,888).

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