SanDisk/WD Assigned Ten Patents

NAND memory strings and methods of fabrication thereof
SanDisk Technologies, Inc., Plano, TX, has been assigned a patent (9,379,132) developed by Koka, Sateesh, Milpitas, CA, Makala, Raghuveer S., Campbell, CA, Zhang, Yanli, San Jose, CA, Kanakamedala, Senaka, Milpitas, CA, Sharangpani, Rahul, Fremont, CA, Lee, Yao-Sheng, Tampa, FL, and Matamis, George, Danville, CA, for a “NAND memory strings and methods of fabrication thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Methods of making monolithic three-dimensional memory devices include performing a first etch to form a memory opening and a second etch using a different etching process to remove a damaged portion of the semiconductor substrate from the bottom of the memory opening. A single crystal semiconductor material is formed over the substrate in the memory opening using an epitaxial growth process. Additional embodiments include improving the quality of the interface between the semiconductor channel material and the underlying semiconductor layers in the memory opening which may be damaged by the bottom opening etch, including forming single crystal semiconductor channel material by epitaxial growth from the bottom surface of the memory opening and/or oxidizing surfaces exposed to the bottom opening etch and removing the oxidized surfaces prior to forming the channel material. Monolithic three-dimensional memory devices formed by the embodiment methods are also disclosed.“

The patent application was filed on October 24, 2014 (14/523,287).

Three-dimensional memory structure
SanDisk Technologies, Inc., Plano, TX, has been assigned a patent (9,368,509) developed by Pang, Liang, Fremont, CA, Pachamuthu, Jayavel, and Dong, Yingda, San Jose, CA, for a “three-dimensional memory structure having self-aligned drain regions and methods of making thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory stack structure can be formed through a stack of an alternating plurality of first material layers and second material layers and through an overlying temporary material layer having a different composition than the first and second material layers. The memory stack structure can include a memory film and a semiconductor channel layer. The overlying temporary material layer is removed selective to the stack to form a lateral recess. Portions of the memory film are removed around the lateral recess, and dopants are laterally introduced into an upper portion of the semiconductor channel to form a self-aligned drain region.“

The patent application was filed on October 15, 2014 (14/514,925).

Storage control system
SanDisk Technologies, Inc., Plano, TX, with applicant: SMART Storage Systems, Inc., Chandler, AZ, has been assigned a patent (9,367,353) developed by Ellis, Robert W., Phoenix, AZ, DelPapa, Kenneth B., Madison, WI, Lucas, Gregg S., Tucson, AZ, and Jones, Ryan, Mesa, AZ, for a “storage control system with power throttling mechanism and method of operation thereof.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A storage control system, and a method of operation thereof, including: a host interface module for receiving a host command from a host system, a power measurement module, coupled to the host interface module, for reading a current value of an electrical power supplied by the host system in response to the host command, and a schedule module, coupled to the power measurement module, for scheduling new operations to be executed in parallel in non-volatile memory devices, the new operations are scheduled when the current value of the electrical power does not exceed a power limit.“

The patent application was filed on June 25, 2013 (13/926,824).

High endurance non-volatile storage
SanDisk Technologies, Inc., Plano, TX, has been assigned a patent (9,361,986) developed by Chen, Jian, San Jose, CA, Gorobets, Sergei, Edinburgh, Great Britain, Sprouse, Steven, San Jose, CA, Kuo, Tien-Chien, Sunnyvale, CA, Li, Yan, Milpitas, CA, Lee, Seungpil, San Ramon, CA, Mak, Alex, Los Altos, CA, Dutta, Deepanshu, Santa Clara, CA, and Higashitani, Masaaki, Cupertino, CA, for a “high endurance non-volatile storage.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A non-volatile storage system is disclosed that includes non-volatile memory cells designed for high endurance and lower retention than other non-volatile memory cells.“

The patent application was filed on September 18, 2012 (13/622,045).

Improving utility of storage media
SanDisk Technologies, Inc., Plano, TX, with applicant :Longitude Enterprise Flash S.a.r.l., Luxembourg, has been assigned a patent (9,361,029) developed by Strasser, John, Kaysville, UT, Flynn, David, Sandy, UT, Fillingim, Jeremy, Salt Lake City, UT, Wood, Robert, Niwot, CO, Hyun, Jea, Los Altos, CA, and Sun, Hairong, Superior, CO, for a “system, method, and apparatus for improving the utility of storage media.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”One method for improving the utility of solid-state storage media within a solid state storage device includes referencing one or more storage media characteristics for a set of storage cells of the solid-state storage media. The method also includes determining a configuration parameter for the set of storage cells based on the one or more storage media characteristics. The method includes configuring the set of storage cells to use the determined configuration parameter. The configuration parameter includes a parameter of the set of storage cells modifiable by a module external to the solid-state storage device by way of an interface. The module external to the solid-state storage device includes a device driver executing on a host device.“

The patent application was filed on January 30, 2015 (14/611,088).

Three-dimensional memory devices containing memory stack structures
SanDisk Technologies, Inc., Plano, TX, has been assigned a patent (9,356,043) developed by Sakakibara, Kiyohiko, and Yada, Shinsuke, Yokkaichi, Japan, for a “three-dimensional memory devices containing memory stack structures with position-independent threshold voltage.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The threshold voltage for vertical transistors in three-dimensional memory stack structures can be made independent of a lateral distance from a source region by forming a doped pocket region. The doped pocket region has the same conductivity type as a doped well that constitutes horizontal portions of the semiconductor channels that extend into the memory stack structures, and has a higher dopant concentration level than the doped well. The doped pocket region and a source region can be simultaneously formed by implanting p-type dopants and n-type dopants into a surface portion of the substrate underlying a backside contact trench. By selecting dopant species having different diffusion rates, the doped pocket region can surround the source region. The process parameters of the anneal process can be selected such that the interface between the dopant pocket region and the doped well underlies outermost memory stack structures.“

The patent application was filed on June 22, 2015 (14/746,042).

Data recovery in 3D memory device
SanDisk Technologies, Inc., Plano, TX, has been assigned a patent (9,355,735) developed by Chen, Jian, San Jose, CA, Yuan, Jiahui, Fremont, CA, Dong, Yingda, San Jose, CA, and Kwong, Charles, Redwood City, CA, for a “data recovery in a 3D memory device with a short circuit between word lines.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Techniques for detecting word line layers which are shorted together due to a defect in a three-dimensional stack memory device, and for recovering data. The memory device comprises blocks of memory cells in which each block has a separate stack of word line layers but the word line layers at a common height in the different stacks are connected. A process to detect a short circuit occurs when an nth word line layer, (WLn) in an ith block fails to successfully complete programming. A determination is made as to whether WLn is shorted to WLn-1 and/or WLn+1. If WLn is shorted to WLn+1 but not WLn-1 in the ith block, a recovery read process is performed to read the data which has been programmed into the memory cells of WLn of the previously-programmed blocks. The recovery read process uses upshifted control gate read voltages due to the short circuit.“

The patent application was filed on February 20, 2015 (14/627,575).

Latch initialization for data storage device
SanDisk Technologies, Inc., Plano, TX, has been assigned a patent (9,355,732) developed by Lasser, Menahem, Kohav-Yair, Israel, for a “latch initialization for a data storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device may include a memory die. The memory die includes a memory and a latch. A method may include receiving a command corresponding to a write operation to write information to the memory. The method may further include loading a set of bits into the latch prior to receiving the information at the memory die. The set of bits includes at least a first bit having a first value and a second bit having a second value that is different than the first value. The method further includes receiving the information at the memory die and overwriting at least a portion of the set of bits at the latch with the information.“

The patent application was filed on October 1, 2014 (14/504,268).

Intelligent flash management
SanDisk Technologies, Inc., Plano, TX, has been assigned a patent (9,355,022) developed by Ravimohan, Narendhiran Chinnaanangur, Kannappan, Vithya, and Nedunchezhiyan, Saranya, Karnataka, India, for a “systems and methods for intelligent flash management.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Systems and method for performing intelligent flash management are disclosed. A controller may determine if a write pattern exists between a set of writes associated with a first data chunk and a set of writes associated with a second data chunk based on whether a number of writes for first data chunk is equal to a number of writes for second data chunk, a degree to which a sequence of logical block address for the first data chunk matches the sequence of logical block addresses for the second data chunk, and a degree to which a size of each write for the first data chunk matches a size of each write for the second data chunk. The controller may then perform storage management operations based on whether or not a write pattern exists.“

The patent application was filed on March 4, 2013 (13/784,429).

Distributed computing in non-volatile memory
SanDisk Technologies, Inc., Plano, TX, has been assigned a patent (9,354,824) developed by Lam, William Kwei-Cheung, Newark, CA, for a “system and method for distributed computing in non-volatile memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A system and method are disclosed for incorporating mathematical and/or logical functionality within a memory system, such as a solid state drive, (SSD)). The mathematical and/or logical functionality may comprise an arithmetic logic unit, (ALU). The ALU may be resident in one or both of flash memory chips or the SSD controller. When resident in the flash memory chips, a single ALU or multiple ALUs may be used. For example, a single ALU may be assigned to one, some, or each block of flash memory within the flash memory chip. As another example, an ALU may be assigned to a sub-block construct, such as to each bit line in the block. Having ALUs resident in the SSD enables more processing to be performed within the SSD and reduces the need to transmit data outside of the SSD for processing.“

The patent application was filed on January 8, 2016 (14/991,536).