This high performance device can read and write data at 104MHz without the write delays encountered in other non-volatile technology such as NOR Flash.
Combined with limitless write cycle endurance, the MR10Q010 is for applications that require continuous recording of critical system data with the added benefit of protection of the data in the event of unexpected power loss, without the need for batteries or capacitors. Applications such as enterprise RAID controllers can take advantage of these features to enhance the reliability of mission critical storage systems by using the MR10Q010 as a journal memory that records continuously updated system metadata.
Everspin has also sampled the MR10Q010 in a 24 ball BGA package that allows simple replacement of other Quad SPI products. This package will be available in volume in July 2016. This gives designers the choice of two mainstream packages for the MR10Q010, the 16 pin SOIC and 24 ball BGA.
“Customers now have more choices when it comes to selecting the best solution for applications requiring extremely fast write speeds and very high endurance,” said Scott Sewell, VP sales and marketing, Everspin. “The Quad SPI interface simplifies system design while offering higher bandwidth, and the choice of packages between SOIC and BGA gives designers more flexibility for board design.”
For systems requiring lower instruction overhead and faster processor execution time, the MR10Q010 supports Execute in Place (XIP) and Quad Peripheral Instructions (QPI) that reduce the number of clock cycles required to perform certain read and write operations, freeing up the processor for other operations. The MR10Q010 offers byte addressability, which allows very fast code or data changes as compared to NOR Flash, which requires full-page program and erase cycles.
Customers can also order evaluation boards for testing the MR10Q010 in full Quad SPI mode. The MR10Q010-EVAL1 shield works with the STM32 Nucleo processor system and comes with a user’s guide for the hardware and software setup to evaluate the MRAM.