Micron Assigned Eighteen Patents

Verify or read pulse for phase change memory and switch
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,230,643) developed by Castro, Hernan, Shingle Springs, CA, Langtry, Timothy C., San Jose, CA, Dodge, Richard, Santa Clara, CA, and Karpov, Ilya, Fremont, CA, for a “verify or read pulse for phase change memory and switch.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Embodiments disclosed herein may relate to applying verify or read pulses for phase change memory and switch, (PCMS) devices. The read pulses may be applied at a first voltage for a first period of time. A threshold event for the phase change memory cell may be detected during a sense window. The sense window may close after the expiration of the first period of time for which the read pulses are applied.“

The patent application was filed on October 30, 2014 (14/528,976).

Devices and processes for multi-state phase change devices
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,227,378) developed by Colombo, Davide, Milan, Italy, and Erbetta, Davide, Trezzo sull’Adda, Italy, for a “methods, devices and processes for multi-state phase change devices.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Devices include multiple phase change materials connected in parallel between electrodes. Memory cells with multiple parallel phase change materials can be programmed to transition among more than two states representing multiple bits of information. Methods for manufacture and use are also disclosed.“

The patent application was filed on August 7, 2012 (13/568,509).

Variable resistance memory with lattice array using enclosing transistors
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,209,395) developed by Liu, Jun, Boise, ID, for a “variable resistance memory with lattice array using enclosing transistors.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A variable resistance memory array, programming a variable resistance memory element and methods of forming the array. A variable resistance memory array is formed with a plurality of word line transistors surrounding each phase change memory element. To program a selected variable resistance memory element, all of the bitlines are grounded or biased at the same voltage. A top electrode select line that is in contact with the selected variable resistance memory element is selected. The word line having the word line transistors surrounding the selected variable resistance memory element are turned on to supply programming current to the element. Current flows from the selected top electrode select line through the variable resistance memory element into the common source/drain region of the surrounding word line transistors, across the transistors to the nearest bitline contacts. The word lines are patterned in various lattice configurations.“

The patent application was filed on February 25, 2013 (13/776,354).

Timing violation handling in synchronous interface memory
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,208,835) developed by Ferrario, Marco, Milan, Italy, Laurent, Christophe Vincent Antoine, Agrate Brianza, Italy, and Mastroianni, Francesco, Melzo, Italy, for a “timing violation handling in a synchronous interface memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A phase-change memory includes a phase to provide an upper row address from a row address buffer, a phase to combine the upper row address with a lower row address to select data for a row data buffer, and a phase to output the data from the row data buffer, where an activate command starts and following activate commands are ignored until a preset time has elapsed.“

The patent application was filed on December 29, 2009 (13/518,371).

Forming self-aligned conductive lines for resistive random access memories
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,196,530) developed by Tortorelli, Innocenzo, Moncalieri, Italy, Pellizzer, Fabio, Cornate d’Adda, Italy, and Petruzza, Pietro, Pessano con Bornago, Italy, for a “forming self-aligned conductive lines for resistive random access memories.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Resistive random access memory elements, such as phase change memory elements, may be defined using a plurality of parallel conductive lines over a stack of layers, at least one of which includes a resistive switching material. The stack may be etched using the conductive lines as a mask. As a result, memory elements may be self-aligned to the conductive lines.“

The patent application was filed on May 19, 2010 (12/782,809).

Read distribution management for phase change memory
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,196,359) developed by Bedeschi, Ferdinando, Biassono, Italy, and Gastaldi, Roberto, Agrate Brianza, Italy, for a “read distribution management for phase change memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a phase change memory.“

The patent application was filed on December 15, 2014 (14/571,137).

Memory devices and formation
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,190,265) developed by Liu, Jun, and Sandhu, Gurtej S., Boise, ID, for a “memory devices and formation methods.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is bonded to the insulator material and at least some of the substrate is removed where bonded to the insulator material. After the removing, a memory cell is formed having a word line, an access diode, a state-changeable memory element containing chalcogenide phase change material, and a bit line all electrically connected in series, the access diode containing the junction as a p-n junction. A memory device includes an adhesion material over the insulator material and bonding the word line to the insulator material.“

The patent application was filed on April 8, 2014 (14/247,653).

Descending set verify for phase change memory
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,183,928) developed by Bedeschi, Ferdinando, Biassono, Italy, for a “descending set verify for phase change memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a phase change memory.“

The patent application was filed on December 29, 2009 (13/511,987).

Memory elements using self-aligned phase change material layers
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,178,141) developed by Liu, Jun, Boise, ID, for a “memory elements using self-aligned phase change material layers and methods of manufacturing same.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory element and method of forming the same. The memory element includes a first electrode within a via in a first dielectric material. An insulating material element is positioned over and in contact with the first electrode. A phase change material is positioned over the first electrode and in contact with sidewalls of the insulating material element. The phase change material has a first surface in contact with a surface of the first electrode and a surface of the first dielectric material. A second electrode is in contact with a second surface of the phase change material, which is opposite to the first surface.“

The patent application was filed on January 7, 2014 (14/149,045).

Resistive memory cell fabrication
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,172,040) developed by Liu, Jun, and Violette, Michael P., Boise, ID, for a “resistive memory cell fabrication methods and devices.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A phase change memory cell and methods of fabricating the same are presented. The memory cell includes a variable resistance region and a top and bottom electrode. The shapes of the variable resistance region and the top electrode are configured to evenly distribute a current with a generally hemispherical current density distribution around the first electrode.“

The patent application was filed on August 19, 2014 (14/463,160).

Reliable set operation for phase-change memory cell
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,171,614) developed by Bedeschi, Ferdinando, Biassono, Italy, for a “reliable set operation for phase-change memory cell.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A Phase-Change Memory, (PCM) device and a method of writing data to the PCM device are described. The PCM device includes a multi-phase data storage cell having at least a Set state and a Reset state that may be established using a heater configured to heat the data storage cell. A memory interface may be coupled with the heater configured to write data to the data storage cell, the data being represented by the Set or the Reset states. A write Reset pulse is used to place the data storage cell in the Reset state corresponding to a read value that is less than a read threshold. A write Set pulse that is a predetermined function of the write Reset pulse is used to place the data storage cell in the Set state. The PCM device may include additional intermediate states that enable each data storage cell to store two or more bits of information. Other embodiments may be described and claimed..“

The patent application was filed on December 9, 2013 (14/100,252).

Electrodes having conductive barrier material
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,166,158) developed by Lengade, Swapnil A., Meldrim, John M., Boise, ID, and Gotti, Andrea, Pozzo D’Adda, Italy, for a “apparatuses including electrodes having a conductive barrier material and methods of forming same.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, and a second electrode portion is coupled to the second chalcogenide structure. An electrically conductive barrier material is disposed between the first and second electrode portions..“

The patent application was filed on February 25, 2013 (13/776,485).

Read bias management to reduce read errors for phase change memory
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,164,829) developed by Bedeschi, Ferdinando, Biassono, Italy, for a “read bias management to reduce read errors for phase change memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”During a read process for a memory device, such as a phase change memory device, a bias condition can be applied to a memory cell to determine the memory cell’s state. The determined state of the memory cell can depend on a threshold voltage of the memory cell. The threshold voltage of the memory cell may shift over time. The shift in threshold voltage may result in read errors. The applied bias condition may be modified based on the resulting read errors.“

The patent application was filed on May 5, 2014 (14/269,869).

Thermally optimized phase change memory cells
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,153,777) developed by Boniardi, Mattia, Cormano, Italy, and Redaelli, Andrea, Castatenovo, Italy, for a “thermally optimized phase change memory cells and methods of fabricating the same.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A thermally optimized phase change memory cell includes a phase change material element disposed between first and second electrodes. The second electrode includes a thermally insulating region having a first thermal resistivity over the first electrode and a metallic contact region interposed between the phase change material element and the thermally insulating region, where the metallic contact layer has a second thermal resistivity lower than the first thermal resistivity.“

The patent application was filed on June 3, 2013 (13/908,707).

Phase change current density control structure
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,147,838) developed by Daley, Jon, and Campbell, Kristy A., Boise, ID, for a “phase change current density control structure.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers.“

The patent application was filed on September 9, 2014 (14/481,411).

Phase change memory cells
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,136,467) developed by Van Gerpen, Damon E., Kuna, ID, and Bez, Roberto, Milan, Italy, for a “phase change memory cells and methods of forming phase change memory cells.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A phase change memory cell has first and second electrodes having phase change material there-between. The phase change memory cell is devoid of heater material as part of either of the first and second electrodes and being devoid of heater material between either of the first and second electrodes and the phase change material. A method of forming a memory cell having first and second electrodes having phase change material there-between includes lining elevationally inner sidewalls of an opening with conductive material to comprise the first electrode of the memory cell. Elevationally outer sidewalls of the opening are lined with dielectric material. Phase change material is formed in the opening laterally inward of and electrically coupled to the conductive material in the opening. Conductive second electrode material is formed that is electrically coupled to the phase change material. Other implementations are disclosed.“

The patent application was filed on April 30, 2012 (13/460,302).

Memory devices with reduced operational energy in phase change material
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,135,992) developed by Meade, Roy E., Boise, ID, for a “methods for forming memory devices with reduced operational energy in phase change material.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Methods of forming and operating phase change memory devices include adjusting an activation energy barrier between a metastable phase and a stable phase of a phase change material in a memory cell. In some embodiments, the activation energy barrier is adjusted by applying stress to the phase change material in the memory cell. Memory devices include a phase change memory cell and a material, structure, or device for applying stress to the phase change material in the memory cell. In some embodiments, a piezoelectric device may be used to apply stress to the phase change material. In additional embodiments, a material having a thermal expansion coefficient greater than that of the phase change material may be positioned to apply stress to the phase change material.“

The patent application was filed on September 19, 2011 (13/236,178).

Phase change memory
Micron Technology, Inc., Boise, ID, has been assigned a patent (9,130,163) developed by Tang, Sanh D., Boise, ID, for a “phase change memory structures and methods.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method of forming a phase change material memory cell includes forming a number of memory structure regions, wherein the memory structure regions include a bottom electrode material and a sacrificial material, forming a number of insulator regions between the number of memory structure regions, forming a number of openings between the number of insulator regions and forming a contoured surface on the number of insulator regions by removing the sacrificial material and a portion of the number of insulator regions, forming a number of dielectric spacers on the number of insulator regions, forming a contoured opening between the number of insulator regions and exposing the bottom electrode material by removing a portion of the number of dielectric spacers, and forming a phase change material in the opening between the number of insulator regions.“

The patent application was filed on October 10, 2013 (14/051,212).