Toshiba Assigned Six Patents

Disk device
Kabushiki Kaisha Toshiba, Tokyo, Japan, has been assigned a patent (8,917,477) developed by Miyake Koji, Sagamihara, Japan, Imamura Takahiro, Fujisawa, Japan, and Kobatake Shinichi, Yokohama, Japan, for a “disk device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, a disk device includes a disk recording medium, a drive motor configured to support and rotate a recording medium, a suspension assembly which supports a head, a housing containing the recording medium, the drive motor and the suspension assembly, a filter in the housing, opposite to part of an outer peripheral edge of the recording medium, and through which an airflow generated by rotation of the recording medium flows, an exhaust hole formed at the housing and located opposite to an upstream side of the filter with respect to the airflow, and an air-intake formed at the housing and located opposite to a region of the housing, whose pressure is lower than the pressure of the upstream side of the filter. “

The patent application was filed on April 18, 2014 (14/256,855).

Digital video recording system and its recording medium
Kabushiki Kaisha Toshiba, Tokyo, Japan, has been assigned a patent (8,917,973) developed by Ando Hideo, Hino, Japan, Uyama Kazuyuki, Kumagaya, Japan, and Kikuchi Shinichi, Yokohama, Japan, for a “digital video recording system and its recording medium .”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “In a DVD recording/playback system, a set top box STB receives an MPEG transport stream constituted by a plurality of transport packets, and a formatter extracts support information indicating if management information included in the transport packets includes predetermined items. A disc drive that records data on a recording medium having a management area and data area records the support information in the management area.“

The patent application was filed on July 29, 2013 (13/953,267).

Non-volatile semiconductor storage apparatus
Kabushiki Kaisha Toshiba, Tokyo, Japan, has been assigned a patent (8,918,699) developed by Igari Fubito, Yokohama, Japan, Suto Hiroyuki, Kamakura, Japan, and Ozawa Yasuyuki, Tama, Japan, for a “non-volatile semiconductor storage apparatus.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.“

The patent application was filed on January 29, 2013 (13/753,128).

Information processing device, program verification method, and recording medium
Kabushiki Kaisha Toshiba, Tokyo, Japan, has been assigned a patent (8,918,654) by developed Hashimoto Mikio, Haruki Hiroyoshi, Fujimatsu Yurie, Kanagawa, Japan, and Kawabata Takeshi, Tokyo, Japan, for a “information processing device, program verification method, and recording medium.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A first storage unit stores a plurality of security functions each defining a first protection attribute requiring a storage of a value of an argument for input/output of data. A second storage unit stores a program list describing a second protection attribute of a variable indicating a storage area of the data and an executing procedure of a predetermined process. An identifying unit identifies a third protection attribute of an actual argument for input/output of a security function based on the second protection attribute. When a judging unit judges not all of third protection attributes match with first protection attributes, an output unit outputs error information indicating a mismatch of the protection attributes.“

The patent application was filed on November 19, 2008 (12/274,024).

Controller for storage device and method for controlling storage device
Kabushiki Kaisha Toshiba, Tokyo, Japan, has been assigned a patent (8,918,560) developed by Nishikawa Hiroyuki, Saitama-ken, Japan, Yamamoto Keiji, Tokyo, Japan, Namba Yoshiki, Kanagawa-ken, Japan, Tashiro Taichi, and Nakamura Kohta, Tokyo, Japan, for a “controller for storage device and method for controlling storage device. ”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A controller for a storage device is connected to a host system and the storage device. A buffer memory includes first and second storage areas. A timer counts a preset given time in response to an instruction to start counting and sends a deadline notification when A given time is elapsed. A command responding portion, when receiving a read command from the host system, instructs the timer to start counting and thereafter outputs a read instruction to read data from the storage system. A data processing portion, in response to the read instruction by the command responding portion, reads specified data from the storage device and holds the read data in the second storage area of the buffer memory. A read control portion sends the host system the data held in the second storage area of the buffer memory when the deadline notification is received from the timer.“

The patent application was filed on August 6, 2012 (13/567,940).

Nonvolatile semiconductor storage device
Kabushiki Kaisha Toshiba, Tokyo, Japan, has been assigned a patent (8,917,552) developed by Maeda Takashi, Kanagawa, Japan, for a “nonvolatile semiconductor storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A control circuit for a nonvolatile semiconductor storage device, during a write operation, configures multiple bit lines so that bit lines that are adjacent to select bit lines are nonselect bit lines. The control circuit applies a first voltage to a write bit line that is included in the select bit lines, and also applies a second voltage that is higher than the first voltage, to a write inhibit bit line that is included in the select bit lines. Then, the control circuit applies a third voltage that is higher than the second voltage to the nonselect bit lines. As a result, the control circuit raises the voltage of the write inhibit bit line, while maintaining the write bit line at the first voltage. Next, the control circuit applies a fourth voltage for the write operation to the drain-side select gate line.“

The patent application was filed on March 3, 2013 (13/783,360).