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Micron Assigned Patent

Multi-serial interface stacked-die memory architecture

Micron Technology, Inc., Boise, ID, has been assigned a patent (8,806,131) developed by Joe M. Jeddeloh, Shoreview and Paul A. LaBerge, Shoreview, MN, for a “multi-serial interface stacked-die memory architecture.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems and methods disclosed herein substantially concurrently transfer a plurality of streams of commands, addresses, and/or data across a corresponding plurality of serialized communication link interfaces (SCLIs) between one or more originating devices or destination devices such as a processor and a switch. At the switch, one or more commands, addresses, or data corresponding to each stream can be transferred to a corresponding destination memory vault controller (MVC) associated with a corresponding memory vault. The destination MVC can perform write operations, read operations, and/or memory vault housekeeping operations independently from concurrent operations associated with other MVCs coupled to a corresponding plurality of memory vaults.”

The patent application was filed on July 8, 2011 (13/179,156).

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