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LSI (Avago/Seagate) Assigned Seven Patents

Write driver circuit, read channel, multiple read heads, flash and storage controller, RAID, NAS gateway

Over-the-rail write driver for magnetic storage systems
LSI Corp., San Jose, CA, has been assigned a patent (8,804,261) developed by Paul Mark Mazur, Cottage Grove, MN, and Michael Joseph Peterson, Eagan, MN, for an “over-the-rail write driver for magnetic storage systems.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A write driver circuit for generating a write current pulse for use by a magnetic write head includes an output stage adapted for connection with the magnetic write head and a charge storage circuit connected with the output stage. The charge storage circuit is operative in a first mode to store a prescribed charge and is operative in a second mode to transfer at least a portion of the charge stored therein to the output stage to thereby enable an output voltage level of the output stage to extend beyond a voltage supply rail of the write driver circuit. A control circuit in the write driver circuit is operative to generate at least one control signal for selectively controlling a mode of operation of the charge storage circuit.”

The patent application was filed on July 27, 2012 (13/560,815).

Meta data handling within a flash media controller
LSI Corp., San Jose, CA, has been assigned a patent (8,806,112) developed by six co-inventors for “meta data handling within a flash media controller.”

The co-inventors are Vinay Ashok Somanache, Pune, India, Michael S. Hicken, Rochester, MN, Pamela S. Hempstead, Oronoco, MN, Timothy W. Swatosh, Rochester, MN, Jackson L. Ellis, Fort Collins, CO, and Martin S. Dell, Bethlehem, PA.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method for handling meta data stored in a page of a flash memory within a flash media controller. The method generally includes (i) defining the meta data on a per context basis, where the context is defined on a per page basis, (ii) when a size of the meta data is less than or equal to a predefined threshold, storing the complete meta data within a structure of the context, and (iii) when the size of the meta data is greater than the predefined threshold, defining meta data pointers within the context.”

The patent application was filed on Dec. 22, 2011 (13/334,599).

Adaptive maximum a posteriori detector in read channel
LSI Corp., San Jose, CA, has been assigned a patent (8,797,666) developed by Haitao Xia, San Jose, CA, and Lei Chen, Sunnyvale, CA, for “adaptive maximum a posteriori (MAP) detector in read channel.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An adaptive detector, such as a maximum a posteriori (MAP) detector for a read channel, is disclosed. In one or more embodiments, a data processing apparatus, such as a read channel digital front end, includes an equalizer configured to equalize X sample data to yield equalized Y sample data. A noise predictive filter configured to receive the equalized Y sample data yielded by the equalizer is operable to filter noise in the equalized Y sample data. A detector is configured to perform iterative data detection on the filtered equalized Y sample data. The detector is operable to program a branch metric, a variance, and a scaling factor for equalizer adaptation during a global iteration of the detector.”

The patent application was filed on Oct. 12, 2012 (13/650,562).

Monitoring fly height of multiple read heads of storage device
LSI Corp., San Jose, CA, has been assigned a patent (8,810,955) developed by Xiufeng Song and George Mathew, San Jose, CA, for a “system and method for monitoring fly height of multiple read heads of a storage device.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The disclosure is directed to monitoring changes in fly height for a plurality of read heads. Readback signals based upon a first periodic data sequence and a second periodic data sequence are detected using at least a first read head and a second read head at a first point in time corresponding to a first fly height of each read head and at a second point in time corresponding to a second fly height each read head. The difference between the first fly height and the second fly height of the first read head and the difference between the first fly height and the second fly height of the second read head are determined by comparing the respectively detected readback signals. A summation of the difference values, each having been multiplied by a fusion coefficient, is then used to estimate a global change in fly height.”

The patent application was filed on Feb. 13, 2014 (14/179,923).

Marking writes on write-protected failed device to avoid reading stale data in RAID
LSI Corp., San Jose, CA, has been assigned a patent (8,812,901) developed by Robert L. Sheffield Jr., Longmont, CO, for “methods and apparatus for marking writes on a write-protected failed device to avoid reading stale data in a RAID storage system.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and apparatus for improved building of a hot spare storage device in a RAID storage system while avoiding reading of stale data from a failed storage device. In the recovery mode of the failed device, all data is write protected on the failed device. A RAID storage controller may copy as much readable data as possible from the failed device to the hot spare storage device. Unreadable data may be rebuilt using redundant information of the logical volume. Write requests directed to the failed device cause the addressed logical block address (LBA) to be marked as storing stale data. When a read request is directed to such a marked LBA, the read request returns an error status from the failed device to indicate that the data is stale. The RAID controller then rebuilds the now stale data for that LBA from redundant information of the logical volume.”

The patent application was filed on Sept. 23, 2011 (13/241,711).

Manage I/O performance and/or deadlock in NAS gateway connected to SAN
LSI Corp., San Jose, CA, has been assigned a patent (8,819,302) developed by Madhukar Gunjan Chakhaiyar, Bihar, India, and Mahmoud K. Jibbe, Wichita, KS, for a “system to manage input/output performance and/or deadlock in NAS gateway connected to a SAN environment.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a plurality of intermediate signals in response to a plurality of input/output requests. The second circuit may be configured to generate a plurality of processed input/output requests in response to the plurality of input/output requests. The processed input/output requests may be configured to be processed by a drive controller to access a drive array in accordance with a protocol used to process the input/output requests.”

The patent application was filed on June 13, 2011 (13/158,621).

Improved buffer allocation in storage controller
LSI Corp., San Jose, CA, has been assigned a patent (8,793,443) developed by five co-inventors for “methods and structure for improved buffer allocation in a storage controller.”

The co-inventors are James A. Rizzo, Austin, TX, Vinu Velayudhan, Fremont, CA, Adam Weiner, Henderson, NE, Rakesh Chandra, Santa Clara, CA, and Phillip V. Nguyen, San Jose, CA.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and structure for improved buffer management in a storage controller. A plurality of processes in the controller each transmits buffer management requests to buffer management control logic. A plurality of reserved portions and a remaining non-reserved portion are defined in a shared pool memory managed by the buffer management control logic. Each reserved portion is defined as a corresponding minimum amount of memory of the shared pool. Each reserved portion is associated with a private pool identifier. Each allocation request from a client process supplies a private pool identifier for the associated buffer to be allocated. The buffer is allocated from the reserved portion if there sufficient available space in the reserved portion identified by the supplied private pool identifier. Otherwise, the buffer is allocated if sufficient memory is available in the non-reserved portion. Otherwise the request is queued for later re-processing.”

The patent application was filed on March 28, 2012 (13/432,150).

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